llvm-6502/lib/Target/AArch64
Arnold Schwaighofer 75e36e847e ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not non-aliasing distinct objects
The code that builds the dependence graph assumes that two PseudoSourceValues
don't alias. In a tail calling function two FixedStackObjects might refer to the
same location. Worse 'immutable' fixed stack objects like function arguments are
not immutable and will be clobbered.

Change this so that a load from a FixedStackObject is not invariant in a tail
calling function and don't return a PseudoSourceValue for an instruction in tail
calling functions when building the dependence graph so that we handle function
arguments conservatively.

Fix for PR23459.

rdar://20740035

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236916 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-08 23:52:00 +00:00
..
AsmParser AArch64: add BFC alias for the BFI/BFM instructions. 2015-04-30 18:28:58 +00:00
Disassembler
InstPrinter AArch64: add BFC alias for the BFI/BFM instructions. 2015-04-30 18:28:58 +00:00
MCTargetDesc [MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin. 2015-04-28 01:37:11 +00:00
TargetInfo
Utils
AArch64.h
AArch64.td
AArch64A53Fix835769.cpp
AArch64A57FPLoadBalancing.cpp
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp IR: Give 'DI' prefix to debug info metadata 2015-04-29 16:38:44 +00:00
AArch64BranchRelaxation.cpp
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp [AArch64] Fix sext/zext folding in address arithmetic. 2015-05-07 19:21:36 +00:00
AArch64FrameLowering.cpp [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
AArch64FrameLowering.h [ShrinkWrap] Add (a simplified version) of shrink-wrapping. 2015-05-05 17:38:16 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 2015-04-28 14:05:47 +00:00
AArch64InstrInfo.cpp
AArch64InstrInfo.h
AArch64InstrInfo.td Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 2015-04-28 14:05:47 +00:00
AArch64ISelDAGToDAG.cpp Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes" 2015-04-28 14:05:47 +00:00
AArch64ISelLowering.cpp ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not non-aliasing distinct objects 2015-05-08 23:52:00 +00:00
AArch64ISelLowering.h Change getTargetNodeName() to produce compiler warnings for missing cases, fix them 2015-05-07 21:33:59 +00:00
AArch64LoadStoreOptimizer.cpp
AArch64MachineCombinerPattern.h
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp
AArch64Subtarget.h
AArch64TargetMachine.cpp
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp [X86] Disable loop unrolling in loop vectorization pass when VF is 1. 2015-05-06 17:12:25 +00:00
AArch64TargetTransformInfo.h [X86] Disable loop unrolling in loop vectorization pass when VF is 1. 2015-05-06 17:12:25 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile