Benjamin Kramer 0ef0e2e6d0 LoopVectorize: Emit reductions as log2(vectorsize) shuffles + vector ops instead of scalar operations. ... For example on x86 with SSE4.2 a <8 x i8> add reduction becomes movdqa %xmm0, %xmm1 movhlps %xmm1, %xmm1 ## xmm1 = xmm1[1,1] paddw %xmm0, %xmm1 pshufd $1, %xmm1, %xmm0 ## xmm0 = xmm1[1,0,0,0] paddw %xmm1, %xmm0 phaddw %xmm0, %xmm0 pextrb $0, %xmm0, %edx instead of pextrb $2, %xmm0, %esi pextrb $0, %xmm0, %edx addb %sil, %dl pextrb $4, %xmm0, %esi addb %dl, %sil pextrb $6, %xmm0, %edx addb %sil, %dl pextrb $8, %xmm0, %esi addb %dl, %sil pextrb $10, %xmm0, %edi pextrb $14, %xmm0, %edx addb %sil, %dil pextrb $12, %xmm0, %esi addb %dil, %sil addb %sil, %dl git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170439 91177308-0d34-0410-b5e6-96231b3b80d8		2012-12-18 18:40:20 +00:00
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CodeGen	Check multiple register classes for inline asm tied registers	2012-12-18 17:50:58 +00:00
DebugInfo	Add support for passing -main-file-name all the way through to	2012-12-18 00:31:01 +00:00
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Instrumentation	[msan] Origin stores and loads do not need explicit alignment.	2012-12-14 13:43:11 +00:00
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TableGen	Fix typo, which prevent test from being check.	2012-12-12 21:10:56 +00:00
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Transforms	LoopVectorize: Emit reductions as log2(vectorsize) shuffles + vector ops instead of scalar operations.	2012-12-18 18:40:20 +00:00
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