Duncan Sands 28b77e968d Add codegen support for vector select (in the IR this means a select ... with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-06 19:07:46 +00:00
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MCTargetDesc
TargetInfo
CMakeLists.txt
Makefile
SystemZ.h
SystemZ.td
SystemZAsmPrinter.cpp
SystemZCallingConv.td
SystemZFrameLowering.cpp
SystemZFrameLowering.h
SystemZInstrBuilder.h
SystemZInstrFormats.td
SystemZInstrFP.td
SystemZInstrInfo.cpp
SystemZInstrInfo.h
SystemZInstrInfo.td
SystemZISelDAGToDAG.cpp
SystemZISelLowering.cpp	Add codegen support for vector select (in the IR this means a select	2011-09-06 19:07:46 +00:00
SystemZISelLowering.h
SystemZMachineFunctionInfo.h
SystemZOperands.td
SystemZRegisterInfo.cpp
SystemZRegisterInfo.h
SystemZRegisterInfo.td
SystemZSelectionDAGInfo.cpp
SystemZSelectionDAGInfo.h
SystemZSubtarget.cpp
SystemZSubtarget.h
SystemZTargetMachine.cpp
SystemZTargetMachine.h