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https://github.com/c64scene-ar/llvm-6502.git
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Lots of machine verifier errors result from using a plain GPR regclass for incoming argument copies. A more restrictive rGPR class is more appropriate since it more accurately represents what's happening, plus it lines up better with isel later on so the verifier is happier. Reduces the number of ARM fast-isel tests not running with the verifier enabled by over half. rdar://12594152 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188592 91177308-0d34-0410-b5e6-96231b3b80d8
145 lines
5.6 KiB
LLVM
145 lines
5.6 KiB
LLVM
; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
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; RUN: llc < %s -O0 -arm-strict-align -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -arm-strict-align -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-STRICT-ALIGN
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
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; RUN: llc < %s -O0 -arm-strict-align -relocation-model=dynamic-no-pic -mtriple=armv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -arm-strict-align -relocation-model=dynamic-no-pic -mtriple=thumbv7-linux-gnueabi -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-STRICT-ALIGN
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-nacl -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -arm-strict-align -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-nacl -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-STRICT-ALIGN
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; RUN: llc < %s -O0 -arm-no-strict-align -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=ARM
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; RUN: llc < %s -O0 -arm-no-strict-align -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=THUMB
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; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=armv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=ARM-STRICT-ALIGN
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; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=thumbv7-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=THUMB-STRICT-ALIGN
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; Check unaligned stores
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%struct.anon = type <{ float }>
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@a = common global %struct.anon* null, align 4
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define void @unaligned_store(float %x, float %y) nounwind {
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entry:
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; ARM: @unaligned_store
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; ARM: vmov r1, s0
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; ARM: str r1, [r0]
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; THUMB: @unaligned_store
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; THUMB: vmov r1, s0
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; THUMB: str r1, [r0]
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%add = fadd float %x, %y
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%0 = load %struct.anon** @a, align 4
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%x1 = getelementptr inbounds %struct.anon* %0, i32 0, i32 0
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store float %add, float* %x1, align 1
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ret void
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}
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; Doublewords require only word-alignment.
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; rdar://10528060
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%struct.anon.0 = type { double }
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@foo_unpacked = common global %struct.anon.0 zeroinitializer, align 4
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define void @word_aligned_f64_store(double %a, double %b) nounwind {
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entry:
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; ARM: @word_aligned_f64_store
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; THUMB: @word_aligned_f64_store
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%add = fadd double %a, %b
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store double %add, double* getelementptr inbounds (%struct.anon.0* @foo_unpacked, i32 0, i32 0), align 4
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; ARM: vstr d16, [r0]
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; THUMB: vstr d16, [r0]
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ret void
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}
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; Check unaligned loads of floats
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%class.TAlignTest = type <{ i16, float }>
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define zeroext i1 @unaligned_f32_load(%class.TAlignTest* %this) nounwind align 2 {
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entry:
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; ARM: @unaligned_f32_load
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; THUMB: @unaligned_f32_load
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%0 = alloca %class.TAlignTest*, align 4
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store %class.TAlignTest* %this, %class.TAlignTest** %0, align 4
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%1 = load %class.TAlignTest** %0
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%2 = getelementptr inbounds %class.TAlignTest* %1, i32 0, i32 1
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%3 = load float* %2, align 1
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%4 = fcmp une float %3, 0.000000e+00
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; ARM: ldr r[[R:[0-9]+]], [r0, #2]
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; ARM: vmov s0, r[[R]]
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; ARM: vcmpe.f32 s0, #0
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; THUMB: ldr.w r[[R:[0-9]+]], [r0, #2]
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; THUMB: vmov s0, r[[R]]
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; THUMB: vcmpe.f32 s0, #0
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ret i1 %4
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}
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define void @unaligned_i16_store(i16 %x, i16* %y) nounwind {
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entry:
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; ARM-STRICT-ALIGN: @unaligned_i16_store
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; ARM-STRICT-ALIGN: strb
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; ARM-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: @unaligned_i16_store
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; THUMB-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: strb
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store i16 %x, i16* %y, align 1
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ret void
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}
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define i16 @unaligned_i16_load(i16* %x) nounwind {
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entry:
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; ARM-STRICT-ALIGN: @unaligned_i16_load
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; ARM-STRICT-ALIGN: ldrb
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; ARM-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: @unaligned_i16_load
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; THUMB-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: ldrb
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%0 = load i16* %x, align 1
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ret i16 %0
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}
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define void @unaligned_i32_store(i32 %x, i32* %y) nounwind {
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entry:
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; ARM-STRICT-ALIGN: @unaligned_i32_store
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; ARM-STRICT-ALIGN: strb
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; ARM-STRICT-ALIGN: strb
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; ARM-STRICT-ALIGN: strb
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; ARM-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: @unaligned_i32_store
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; THUMB-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: strb
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; THUMB-STRICT-ALIGN: strb
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store i32 %x, i32* %y, align 1
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ret void
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}
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define i32 @unaligned_i32_load(i32* %x) nounwind {
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entry:
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; ARM-STRICT-ALIGN: @unaligned_i32_load
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; ARM-STRICT-ALIGN: ldrb
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; ARM-STRICT-ALIGN: ldrb
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; ARM-STRICT-ALIGN: ldrb
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; ARM-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: @unaligned_i32_load
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; THUMB-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: ldrb
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; THUMB-STRICT-ALIGN: ldrb
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%0 = load i32* %x, align 1
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ret i32 %0
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}
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