Matheus Almeida e4439438f6 [mips] Use TwoOperandAliasConstraint for shift instructions. ... This enables TableGen to generate an additional two operand matcher for our shift_rotate_imm and shift_rotate_reg class of instructions. The tests were also updated so that they include now encoding information for all affected instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206398 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-16 16:28:59 +00:00
..
AArch64	AArch64/ARM64: produce correct relocation for conditional branches.	2014-04-16 15:27:52 +00:00
ARM	[MC] Emit an error if cfi_startproc is used before a symbol is defined.	2014-04-15 01:17:45 +00:00
ARM64	AArch64/ARM64: only mangle MOVZ/MOVN during encoding when needed	2014-04-15 14:00:15 +00:00
AsmParser	[MC] Emit an error if cfi_startproc is used before a symbol is defined.	2014-04-15 01:17:45 +00:00
COFF	COFF: fix an off by one error	2014-04-16 06:22:53 +00:00
Disassembler	[ARM64] Change SYS without a register to an alias to make disassembling more consistant.	2014-04-09 14:44:58 +00:00
ELF	Fix up MCFixup::getAccessVariant to handle unary expressions.	2014-04-14 16:50:22 +00:00
MachO	[MC] Emit an error if cfi_startproc is used before a symbol is defined.	2014-04-15 01:17:45 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
Mips	[mips] Use TwoOperandAliasConstraint for shift instructions.	2014-04-16 16:28:59 +00:00
PowerPC	[MC] Emit an error if cfi_startproc is used before a symbol is defined.	2014-04-15 01:17:45 +00:00
Sparc	[Sparc] Add trap on integer condition codes (Ticc) instructions to Sparc backend.	2014-03-02 23:39:07 +00:00
SystemZ	[SystemZ] Add support for z196 float<->unsigned conversions	2014-03-21 10:56:30 +00:00
X86	AVX-512: Implemented masking for integer arithmetic & logic instructions.	2014-03-27 09:45:08 +00:00