Duncan Sands e47561ccff The result of getSetCCResultType (eg: i32) may be larger ...

than the type an i1 is promoted to (eg: i8).  Account
for this.  Noticed by Tilmann Scheller on CellSPU; he
will hopefully take care of fixing this in LegalizeDAG
and adding a testcase!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56997 91177308-0d34-0410-b5e6-96231b3b80d8

2008-10-03 07:41:46 +00:00

..

CallingConvLower.cpp

Add "inreg" field to CallSDNode (doesn't increase

2008-09-26 19:31:26 +00:00

CMakeLists.txt

…

DAGCombiner.cpp

Rename ConstantSDNode's getSignExtended to getSExtValue, for

2008-09-26 21:54:37 +00:00

FastISel.cpp

Implement fast-isel support for zero-extending from i1.

2008-10-03 01:28:47 +00:00

LegalizeDAG.cpp

Handle some 64-bit atomics on x86-32, some of the time.

2008-10-02 18:53:47 +00:00

LegalizeFloatTypes.cpp

…

LegalizeIntegerTypes.cpp

The result of getSetCCResultType (eg: i32) may be larger

2008-10-03 07:41:46 +00:00

LegalizeTypes.cpp

Add "inreg" field to CallSDNode (doesn't increase

2008-09-26 19:31:26 +00:00

LegalizeTypes.h

…

LegalizeTypesGeneric.cpp

…

LegalizeVectorTypes.cpp

…

Makefile

…

ScheduleDAG.cpp

…

ScheduleDAGEmit.cpp

…

ScheduleDAGFast.cpp

…

ScheduleDAGList.cpp

…

ScheduleDAGRRList.cpp

…

SelectionDAG.cpp

Make some implicit conversions explicit, to avoid compiler warnings.

2008-10-01 19:58:59 +00:00

SelectionDAGBuild.cpp

Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:

2008-09-26 22:10:44 +00:00

SelectionDAGBuild.h

…

SelectionDAGISel.cpp

Fix FastISel to not initialize the PIC-base register multiple times

2008-09-29 21:55:50 +00:00

SelectionDAGPrinter.cpp

…

TargetLowering.cpp

Rename ConstantSDNode's getSignExtended to getSExtValue, for

2008-09-26 21:54:37 +00:00