Bill Wendling e488b4ecdc Don't cache the instruction and register info from the TargetMachine, because ... the internals of TargetMachine could change. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183572 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-07 21:04:35 +00:00
..
Analysis	Silencing an MSVC warning about */ being found outside of a comment.	2013-06-04 01:01:56 +00:00
Archive
AsmParser
Bitcode
CodeGen	Add a backend option to warn on a given stack size limit.	2013-06-07 20:18:12 +00:00
DebugInfo	Handle relocations that don't point to symbols.	2013-06-05 01:33:53 +00:00
ExecutionEngine	Handle (at least don't crash on) relocations with no symbols.	2013-06-05 02:55:01 +00:00
IR	DIBuilder: No functionality change.	2013-06-07 18:35:53 +00:00
IRReader
Linker	Extend RemapInstruction and friends to take an optional new parameter, a ValueMaterializer.	2013-05-28 15:17:05 +00:00
MC	Make SubRegIndex size mandatory, following r183020.	2013-05-31 23:45:26 +00:00
Object	Use isxdigit.	2013-06-07 18:05:03 +00:00
Option
Support	Introduce needsCleanup() for APFloat and APInt.	2013-06-03 13:03:05 +00:00
TableGen
Target	Don't cache the instruction and register info from the TargetMachine, because	2013-06-07 21:04:35 +00:00
Transforms	[objc-arc] Ensure that the cfg path count does not overflow when we multiply TopDownPathCount/BottomUpPathCount.	2013-06-07 06:16:49 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile