llvm-6502/utils/TableGen
Chris Lattner 8d30c23d26 Emit this:
static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, };

instead of this:

static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, };

For operand information, which does not require dynamic (startup-time)
initialization.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22931 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 20:29:14 +00:00
..
.cvsignore
AsmWriterEmitter.cpp
AsmWriterEmitter.h
CodeEmitterGen.cpp
CodeEmitterGen.h
CodeGenInstruction.h
CodeGenRegisters.h Split register class "Methods" into MethodProtos and MethodBodies 2005-08-19 19:12:51 +00:00
CodeGenTarget.cpp Split register class "Methods" into MethodProtos and MethodBodies 2005-08-19 19:12:51 +00:00
CodeGenTarget.h
FileLexer.l
FileParser.y
InstrInfoEmitter.cpp Emit this: 2005-08-19 20:29:14 +00:00
InstrInfoEmitter.h Emit real operand info for instructions. This currently works but is bad 2005-08-19 18:46:26 +00:00
InstrSelectorEmitter.cpp
InstrSelectorEmitter.h
Makefile
Record.cpp
Record.h
RegisterInfoEmitter.cpp Expose the derived register classes to the public header, allowing them 2005-08-19 20:23:42 +00:00
RegisterInfoEmitter.h
TableGen.cpp
TableGenBackend.cpp
TableGenBackend.h