mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-05 13:30:38 +00:00
5a06cf644f
now-probably-dead instruction tree feeding it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83778 91177308-0d34-0410-b5e6-96231b3b80d8
175 lines
2.5 KiB
LLVM
175 lines
2.5 KiB
LLVM
; RUN: opt < %s -jump-threading -S | FileCheck %s
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declare i32 @f1()
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declare i32 @f2()
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declare void @f3()
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define i32 @test1(i1 %cond) {
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; CHECK: @test1
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br i1 %cond, label %T1, label %F1
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T1:
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%v1 = call i32 @f1()
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br label %Merge
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F1:
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%v2 = call i32 @f2()
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br label %Merge
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Merge:
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%A = phi i1 [true, %T1], [false, %F1]
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%B = phi i32 [%v1, %T1], [%v2, %F1]
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br i1 %A, label %T2, label %F2
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T2:
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; CHECK: T2:
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; CHECK: ret i32 %v1
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call void @f3()
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ret i32 %B
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F2:
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; CHECK: F2:
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; CHECK: ret i32 %v2
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ret i32 %B
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}
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;; cond is known false on Entry -> F1 edge!
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define i32 @test2(i1 %cond) {
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; CHECK: @test2
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Entry:
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br i1 %cond, label %T1, label %F1
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T1:
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; CHECK: %v1 = call i32 @f1()
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; CHECK: ret i32 47
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%v1 = call i32 @f1()
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br label %Merge
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F1:
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br i1 %cond, label %Merge, label %F2
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Merge:
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%B = phi i32 [47, %T1], [192, %F1]
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ret i32 %B
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F2:
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call void @f3()
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ret i32 12
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}
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; Undef handling.
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define i32 @test3(i1 %cond) {
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; CHECK: @test3
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; CHECK-NEXT: T1:
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; CHECK-NEXT: ret i32 42
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br i1 undef, label %T1, label %F1
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T1:
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ret i32 42
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F1:
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ret i32 17
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}
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define i32 @test4(i1 %cond, i1 %cond2) {
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; CHECK: @test4
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br i1 %cond, label %T1, label %F1
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T1:
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; CHECK: %v1 = call i32 @f1()
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; CHECK-NEXT: br label %T
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%v1 = call i32 @f1()
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br label %Merge
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F1:
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%v2 = call i32 @f2()
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; CHECK: %v2 = call i32 @f2()
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; CHECK-NEXT: br i1 %cond2,
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br label %Merge
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Merge:
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%A = phi i1 [undef, %T1], [%cond2, %F1]
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%B = phi i32 [%v1, %T1], [%v2, %F1]
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br i1 %A, label %T2, label %F2
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T2:
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call void @f3()
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ret i32 %B
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F2:
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ret i32 %B
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}
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;; This tests that the branch in 'merge' can be cloned up into T1.
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define i32 @test5(i1 %cond, i1 %cond2) {
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; CHECK: @test5
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br i1 %cond, label %T1, label %F1
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T1:
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; CHECK: T1:
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; CHECK-NEXT: %v1 = call i32 @f1()
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; CHECK-NEXT: %cond3 = icmp eq i32 %v1, 412
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; CHECK-NEXT: br i1 %cond3, label %T2, label %F2
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%v1 = call i32 @f1()
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%cond3 = icmp eq i32 %v1, 412
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br label %Merge
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F1:
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%v2 = call i32 @f2()
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br label %Merge
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Merge:
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%A = phi i1 [%cond3, %T1], [%cond2, %F1]
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%B = phi i32 [%v1, %T1], [%v2, %F1]
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br i1 %A, label %T2, label %F2
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T2:
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call void @f3()
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ret i32 %B
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F2:
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ret i32 %B
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}
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;; Lexically duplicated conditionals should be threaded.
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define i32 @test6(i32 %A) {
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; CHECK: @test6
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%tmp455 = icmp eq i32 %A, 42
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br i1 %tmp455, label %BB1, label %BB2
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BB2:
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; CHECK: call i32 @f1()
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; CHECK-NEXT: call void @f3()
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; CHECK-NEXT: ret i32 4
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call i32 @f1()
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br label %BB1
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BB1:
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%tmp459 = icmp eq i32 %A, 42
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br i1 %tmp459, label %BB3, label %BB4
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BB3:
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call i32 @f2()
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ret i32 3
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BB4:
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call void @f3()
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ret i32 4
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}
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