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https://github.com/c64scene-ar/llvm-6502.git
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5a70dd1d82
Similar to gep (r230786) and load (r230794) changes.
Similar migration script can be used to update test cases, which
successfully migrated all of LLVM and Polly, but about 4 test cases
needed manually changes in Clang.
(this script will read the contents of stdin and massage it into stdout
- wrap it in the 'apply.sh' script shown in previous commits + xargs to
apply it over a large set of test cases)
import fileinput
import sys
import re
rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL)
def conv(match):
line = match.group(1)
line += match.group(4)
line += ", "
line += match.group(2)
return line
line = sys.stdin.read()
off = 0
for match in re.finditer(rep, line):
sys.stdout.write(line[off:match.start()])
sys.stdout.write(conv(match))
off = match.end()
sys.stdout.write(line[off:])
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
1.0 KiB
LLVM
27 lines
1.0 KiB
LLVM
; RUN: llc -verify-coalescing < %s
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; PR11868
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
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target triple = "armv7-none-linux-gnueabi"
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%0 = type { <4 x float> }
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%1 = type { <4 x float> }
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@foo = external global %0, align 16
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define arm_aapcs_vfpcc void @bar(float, i1 zeroext, i1 zeroext) nounwind {
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%4 = load <4 x float>, <4 x float>* getelementptr inbounds (%0, %0* @foo, i32 0, i32 0), align 16
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%5 = extractelement <4 x float> %4, i32 0
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%6 = extractelement <4 x float> %4, i32 1
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%7 = extractelement <4 x float> %4, i32 2
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%8 = insertelement <4 x float> undef, float %5, i32 0
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%9 = insertelement <4 x float> %8, float %6, i32 1
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%10 = insertelement <4 x float> %9, float %7, i32 2
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%11 = insertelement <4 x float> %10, float 0.000000e+00, i32 3
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store <4 x float> %11, <4 x float>* undef, align 16
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call arm_aapcs_vfpcc void @baz(%1* undef, float 0.000000e+00) nounwind
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ret void
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}
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declare arm_aapcs_vfpcc void @baz(%1*, float)
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