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https://github.com/c64scene-ar/llvm-6502.git
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7419c9c0c0
Thumb1 has legitimate reasons for preferring 32-bit alignment of types i1/i8/i16, since the 16-bit encoding of "add rD, sp, #imm" requires #imm to be a multiple of 4. However, this is a trade-off betweem code size and RAM usage; the DataLayout string is not the best place to represent it even if desired. So this patch removes the extra Thumb requirements, hopefully making ARM and Thumb completely compatible in this respect. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219734 91177308-0d34-0410-b5e6-96231b3b80d8
21 lines
391 B
LLVM
21 lines
391 B
LLVM
; RUN: llc -mtriple=armv7-linux-gnueabi %s -o - | FileCheck %s
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@var_agg = global {i8, i8} zeroinitializer
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; CHECK: .globl var_agg
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; CHECK-NEXT: .align 2
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@var1 = global i1 zeroinitializer
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; CHECK: .globl var1
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; CHECK-NOT: .align
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@var8 = global i8 zeroinitializer
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; CHECK: .globl var8
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; CHECK-NOT: .align
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@var16 = global i16 zeroinitializer
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; CHECK: .globl var16
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; CHECK-NEXT: .align 1 |