mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
27 lines
854 B
LLVM
27 lines
854 B
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32
|
|
; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64
|
|
|
|
define ptx_kernel void @t1(i1* %a) {
|
|
; PTX32: mov.u16 %rs{{[0-9]+}}, 0;
|
|
; PTX32-NEXT: st.u8 [%r{{[0-9]+}}], %rs{{[0-9]+}};
|
|
; PTX64: mov.u16 %rs{{[0-9]+}}, 0;
|
|
; PTX64-NEXT: st.u8 [%rd{{[0-9]+}}], %rs{{[0-9]+}};
|
|
store i1 false, i1* %a
|
|
ret void
|
|
}
|
|
|
|
|
|
define ptx_kernel void @t2(i1* %a, i8* %b) {
|
|
; PTX32: ld.u8 %rs{{[0-9]+}}, [%r{{[0-9]+}}]
|
|
; PTX32: and.b16 %rs{{[0-9]+}}, %rs{{[0-9]+}}, 1;
|
|
; PTX32: setp.eq.b16 %p{{[0-9]+}}, %rs{{[0-9]+}}, 1;
|
|
; PTX64: ld.u8 %rs{{[0-9]+}}, [%rd{{[0-9]+}}]
|
|
; PTX64: and.b16 %rs{{[0-9]+}}, %rs{{[0-9]+}}, 1;
|
|
; PTX64: setp.eq.b16 %p{{[0-9]+}}, %rs{{[0-9]+}}, 1;
|
|
|
|
%t1 = load i1, i1* %a
|
|
%t2 = select i1 %t1, i8 1, i8 2
|
|
store i8 %t2, i8* %b
|
|
ret void
|
|
}
|