llvm-6502/lib/Target/Alpha
2011-02-25 21:41:48 +00:00
..
TargetInfo
Alpha.h
Alpha.td
AlphaAsmPrinter.cpp
AlphaBranchSelector.cpp
AlphaCallingConv.td
AlphaFrameLowering.cpp Teach frame lowering to ignore debug values after the terminators. 2011-01-13 21:28:52 +00:00
AlphaFrameLowering.h
AlphaInstrFormats.td
AlphaInstrInfo.cpp
AlphaInstrInfo.h
AlphaInstrInfo.td
AlphaISelDAGToDAG.cpp
AlphaISelLowering.cpp Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS. 2011-02-25 21:41:48 +00:00
AlphaISelLowering.h Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS. 2011-02-25 21:41:48 +00:00
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaMCAsmInfo.cpp
AlphaMCAsmInfo.h
AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSelectionDAGInfo.cpp
AlphaSelectionDAGInfo.h
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetMachine.cpp
AlphaTargetMachine.h
CMakeLists.txt Use explicit add_subdirectory's for LLVM target sublibraries instead 2011-02-20 02:55:27 +00:00
Makefile
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html