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e54885af9b
in-tree implementations of TargetLoweringBase::isFMAFasterThanMulAndAdd in order to resolve the following issues with fmuladd (i.e. optional FMA) intrinsics: 1. On X86(-64) targets, ISD::FMA nodes are formed when lowering fmuladd intrinsics even if the subtarget does not support FMA instructions, leading to laughably bad code generation in some situations. 2. On AArch64 targets, ISD::FMA nodes are formed for operations on fp128, resulting in a call to a software fp128 FMA implementation. 3. On PowerPC targets, FMAs are not generated from fmuladd intrinsics on types like v2f32, v8f32, v4f64, etc., even though they promote, split, scalarize, etc. to types that support hardware FMAs. The function has also been slightly renamed for consistency and to force a merge/build conflict for any out-of-tree target implementing it. To resolve, see comments and fixed in-tree examples. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185956 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| AArch64 | ||
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| CPP | ||
| Generic | ||
| Hexagon | ||
| Inputs | ||
| MBlaze | ||
| Mips | ||
| MSP430 | ||
| NVPTX | ||
| PowerPC | ||
| R600 | ||
| SI | ||
| SPARC | ||
| SystemZ | ||
| Thumb | ||
| Thumb2 | ||
| X86 | ||
| XCore | ||