Chad Rosier e55ae5f498 [ARM64] Adds Cortex-A53 scheduling support for vector load/store post. ... Patch by Dave Estes<cestes@codeaurora.org>! PR19761 http://reviews.llvm.org/D3829 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209176 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-19 22:59:51 +00:00
..
AArch64	Revert "Implement global merge optimization for global variables."	2014-05-16 13:02:18 +00:00
ARM	SDAG: Legalize vector BSWAP into a shuffle if the shuffle is legal but the bswap not.	2014-05-19 13:12:38 +00:00
ARM64	[ARM64] Adds Cortex-A53 scheduling support for vector load/store post.	2014-05-19 22:59:51 +00:00
CPP
Generic
Hexagon	reverting r209132	2014-05-19 16:22:11 +00:00
Inputs
Mips	Finish materialize for ints	2014-05-15 21:54:15 +00:00
MSP430
NVPTX
PowerPC	DebugInfo: Sure up subprogram variable list handling with more assertions and fewer conditionals.	2014-05-14 21:52:46 +00:00
R600	R600/SI: Promote f32 SELECT to i32	2014-05-16 20:56:41 +00:00
SPARC	TableGen: fix operand counting for aliases	2014-05-16 09:42:04 +00:00
SystemZ
Thumb	Re-enable inline memcpy expansion for Thumb1.	2014-05-16 14:24:22 +00:00
Thumb2	Fix the Load/Store optimization pass to work with Thumb1.	2014-05-16 14:14:30 +00:00
X86	[X86] Add ISel patterns to improve the selection of TZCNT and LZCNT.	2014-05-19 20:38:59 +00:00
XCore