Misha Brukman 3432d1d1d5 Added a debugging code emitter that prints code to a file, debug to std::cerr, ... and passes the real code to a memory-outputting code emitter. This may be removed at a later point in development. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6379 91177308-0d34-0410-b5e6-96231b3b80d8		2003-05-27 22:43:19 +00:00
..
InstrSched	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
InstrSelection	Remove unneccesary &*	2003-04-23 16:36:11 +00:00
Mapping
ModuloScheduling	Just some code beautification changes I had sitting around in my tree.	2003-04-22 23:00:08 +00:00
PostOpts
PreOpts
RegAlloc	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
LiveVariables.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
MachineCodeEmitter.cpp	Added a debugging code emitter that prints code to a file, debug to std::cerr,	2003-05-27 22:43:19 +00:00
MachineCodeForInstruction.cpp
MachineFunction.cpp	Remove unneccesary &*	2003-04-23 16:36:11 +00:00
MachineInstr.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
MachineInstrAnnot.cpp
Makefile
PHIElimination.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
PrologEpilogInserter.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
RegAllocLocal.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00
RegAllocSimple.cpp	(1) Added special register class containing (for now) %fsr.	2003-05-27 00:05:23 +00:00