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%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1 %reg1029<def> = MOV8rr %reg1028 %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead> insert => %reg1030<def> = MOV8rr %reg1028 %reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead> In this case, it might not be possible to coalesce the second MOV8rr instruction if the first one is coalesced. So it would be profitable to commute it: %reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1 %reg1029<def> = MOV8rr %reg1028 %reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead> insert => %reg1030<def> = MOV8rr %reg1029 %reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62954 91177308-0d34-0410-b5e6-96231b3b80d8
33 lines
989 B
LLVM
33 lines
989 B
LLVM
; RUN: llvm-as < %s | llc -march=x86 -mattr=sse41 -stack-alignment=16 > %t
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; RUN: grep pmul %t | count 12
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; RUN: grep mov %t | count 15
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define <4 x i32> @a(<4 x i32> %i) nounwind {
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%A = mul <4 x i32> %i, < i32 117, i32 117, i32 117, i32 117 >
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ret <4 x i32> %A
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}
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define <2 x i64> @b(<2 x i64> %i) nounwind {
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%A = mul <2 x i64> %i, < i64 117, i64 117 >
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ret <2 x i64> %A
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}
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define <4 x i32> @c(<4 x i32> %i, <4 x i32> %j) nounwind {
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%A = mul <4 x i32> %i, %j
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ret <4 x i32> %A
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}
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define <2 x i64> @d(<2 x i64> %i, <2 x i64> %j) nounwind {
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%A = mul <2 x i64> %i, %j
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ret <2 x i64> %A
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}
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; Use a call to force spills.
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declare void @foo()
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define <4 x i32> @e(<4 x i32> %i, <4 x i32> %j) nounwind {
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call void @foo()
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%A = mul <4 x i32> %i, %j
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ret <4 x i32> %A
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}
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define <2 x i64> @f(<2 x i64> %i, <2 x i64> %j) nounwind {
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call void @foo()
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%A = mul <2 x i64> %i, %j
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ret <2 x i64> %A
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}
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