llvm-6502/test/CodeGen
Tim Northover 5bce67a95f DAGCombiner: fix use-counting issue when forming zextload
DAGCombiner was counting all uses of a load node  when considering whether it's
worth combining into a zextload. Really, it wants to ignore the chain and just
count real uses.

rdar://problem/13896307

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185419 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-02 09:58:53 +00:00
..
AArch64 AArch64: correct CodeGen of MOVZ/MOVK combinations. 2013-07-01 19:23:10 +00:00
ARM Revert r185339 (ARM: relax the atomic release barrier to "dmb ishst") 2013-07-01 18:37:33 +00:00
CPP test commit: remove blank line. 2013-03-14 05:43:59 +00:00
Generic Debug Info: clean up usage of Verify. 2013-06-28 05:43:10 +00:00
Hexagon Hexagon: Pass to replace tranfer/copy instructions into combine instruction 2013-05-14 18:54:06 +00:00
Inputs Revert "Adding DIImportedModules to DIScopes." 2013-03-28 02:44:59 +00:00
MBlaze Remove unnecessary leading comment characters in lit-only file 2013-03-18 22:08:16 +00:00
Mips [mips] Fix test case to check that mips64 instructions are generated. 2013-07-01 20:18:58 +00:00
MSP430 Really fix the test. Sorry for the breakage... 2013-07-01 19:51:36 +00:00
NVPTX [NVPTX] Add support for module-scope inline asm 2013-07-01 13:00:14 +00:00
PowerPC Cleanup PPC Altivec registers in CSR lists and improve VRSAVE handling 2013-07-02 03:39:34 +00:00
R600 R600: Support schedule and packetization of trans-only inst 2013-06-29 19:32:43 +00:00
SI
SPARC Switch spill weights from a basic loop depth estimation to BlockFrequencyInfo. 2013-06-17 19:00:36 +00:00
SystemZ [SystemZ] Fix some embarrassing test typos 2013-06-27 09:49:34 +00:00
Thumb LocalStackSlotAllocation improvements 2013-04-30 20:04:37 +00:00
Thumb2 ARM: allow predicated barriers in Thumb mode 2013-06-26 16:52:32 +00:00
X86 DAGCombiner: fix use-counting issue when forming zextload 2013-07-02 09:58:53 +00:00
XCore [XCore] Fix handling of functions where only the LR is spilled. 2013-05-09 16:43:42 +00:00