llvm-6502/test/CodeGen
Dan Gohman a2086b3483 Teach LSR how to cope better with unrolled loops on targets where
the addressing modes don't make this trivially easy. This allows
it to avoid falling into the less precise heuristics in more
cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-19 23:43:12 +00:00
..
Alpha
ARM Teach LSR how to cope better with unrolled loops on targets where 2010-05-19 23:43:12 +00:00
Blackfin
CBackend
CellSPU Make SPU backend not assert on jump tables. 2010-05-11 11:00:02 +00:00
CPP
Generic Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
MBlaze
Mips
MSP430
PIC16
PowerPC Only use clairvoyance when defining a register, and then only if it has one use. 2010-05-17 04:50:57 +00:00
SPARC
SystemZ SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and 2010-05-14 22:17:42 +00:00
Thumb Enable a bunch more -regalloc=fast tests 2010-05-12 00:11:24 +00:00
Thumb2 t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM. 2010-05-19 07:28:01 +00:00
X86 When converting a test to a cmp to fold a load, use the cmp that has an 2010-05-18 21:42:03 +00:00
XCore