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ones noted, which require funny PPC specific inline assembly. If some angel felt the desire to help me, I think this is that last bit missing for JIT support (however, generic code emitter might night work right with the constant pool yet). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18151 91177308-0d34-0410-b5e6-96231b3b80d8
171 lines
6.2 KiB
C++
171 lines
6.2 KiB
C++
//===-- PPC32JITInfo.cpp - Implement the JIT interfaces for the PowerPC ---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the JIT interfaces for the 32-bit PowerPC target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "jit"
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#include "PPC32JITInfo.h"
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#include "PPC32Relocations.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/Config/alloca.h"
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using namespace llvm;
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static TargetJITInfo::JITCompilerFn JITCompilerFunction;
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#define BUILD_ADDIS(RD,RS,IMM16) \
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((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
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#define BUILD_ORI(RD,RS,UIMM16) \
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((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
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#define BUILD_MTSPR(RS,SPR) \
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((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
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#define BUILD_BCCTRx(BO,BI,LINK) \
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((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
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// Pseudo-ops
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#define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
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#define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9)
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#define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK)
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static void EmitBranchToAt(void *At, void *To, bool isCall) {
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intptr_t Addr = (intptr_t)To;
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// FIXME: should special case the short branch case.
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unsigned *AtI = (unsigned*)At;
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AtI[0] = BUILD_LIS(12, Addr >> 16); // lis r12, hi16(address)
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AtI[1] = BUILD_ORI(12, 12, Addr); // ori r12, r12, low16(address)
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AtI[2] = BUILD_MTCTR(12); // mtctr r12
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AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
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}
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static void CompilationCallback() {
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// FIXME: Should save R3-R10 and F1-F13 onto the stack, just like the Sparc
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// version does.
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//int IntRegs[8];
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//uint64_t FPRegs[13];
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unsigned *CameFromStub = (unsigned*)__builtin_return_address(0);
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unsigned *CameFromOrig = (unsigned*)__builtin_return_address(1);
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// Adjust our pointers to the branches, not the return addresses.
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--CameFromStub; --CameFromOrig;
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void *Target = JITCompilerFunction(CameFromStub);
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// Check to see if CameFromOrig[-1] is a 'bl' instruction, and if we can
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// rewrite it to branch directly to the destination. If so, rewrite it so it
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// does not need to go through the stub anymore.
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unsigned CameFromOrigInst = *CameFromOrig;
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if ((CameFromOrigInst >> 26) == 18) { // Direct call.
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intptr_t Offset = ((intptr_t)Target-(intptr_t)CameFromOrig) >> 2;
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if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
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// FIXME: hasn't been tested at all.
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// Clear the original target out:
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CameFromOrigInst &= (63 << 26) | 3;
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CameFromOrigInst |= Offset << 2;
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*CameFromOrig = CameFromOrigInst;
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}
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}
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// Locate the start of the stub. If this is a short call, adjust backwards
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// the short amount, otherwise the full amount.
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bool isShortStub = (*CameFromStub >> 26) == 18;
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CameFromStub -= isShortStub ? 3 : 7;
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// Rewrite the stub with an unconditional branch to the target, for any users
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// who took the address of the stub.
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EmitBranchToAt(CameFromStub, Target, false);
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// FIXME: Need to restore the registers from IntRegs/FPRegs.
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// FIXME: Need to pop two frames off of the stack and return to a place where
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// we magically reexecute the call, or jump directly to the caller. This
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// requires inline asm majik.
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assert(0 && "CompilationCallback not finished yet!");
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}
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TargetJITInfo::LazyResolverFn
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PPC32JITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
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JITCompilerFunction = Fn;
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return CompilationCallback;
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}
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void *PPC32JITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
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// If this is just a call to an external function, emit a branch instead of a
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// call. The code is the same except for one bit of the last instruction.
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if (Fn != CompilationCallback) {
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MCE.startFunctionStub(4*4);
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void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
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MCE.emitWord(0);
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MCE.emitWord(0);
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MCE.emitWord(0);
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MCE.emitWord(0);
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EmitBranchToAt(Addr, Fn, false);
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return MCE.finishFunctionStub(0);
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}
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MCE.startFunctionStub(4*7);
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MCE.emitWord(0x9421ffe0); // stwu r1,-32(r1)
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MCE.emitWord(0x7d6802a6); // mflr r11
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MCE.emitWord(0x91610028); // stw r11, 40(r1)
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void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
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MCE.emitWord(0);
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MCE.emitWord(0);
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MCE.emitWord(0);
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MCE.emitWord(0);
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EmitBranchToAt(Addr, Fn, true/*is call*/);
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return MCE.finishFunctionStub(0);
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}
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void PPC32JITInfo::relocate(void *Function, MachineRelocation *MR,
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unsigned NumRelocs) {
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for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
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unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
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intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
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switch ((PPC::RelocationType)MR->getRelocationType()) {
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default: assert(0 && "Unknown relocation type!");
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case PPC::reloc_pcrel_bx:
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// PC-relative relocation for b and bl instructions.
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ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
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assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
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"Relocation out of range!");
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*RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2;
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break;
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case PPC::reloc_absolute_loadhi: // Relocate high bits into addis
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case PPC::reloc_absolute_la: // Relocate low bits into addi
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ResultPtr += MR->getConstantVal();
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if (MR->getRelocationType() == PPC::reloc_absolute_loadhi) {
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// If the low part will have a carry (really a borrow) from the low
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// 16-bits into the high 16, add a bit to borrow from.
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if (((int)ResultPtr << 16) < 0)
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ResultPtr += 1 << 16;
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ResultPtr >>= 16;
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}
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// Do the addition then mask, so the addition does not overflow the 16-bit
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// immediate section of the instruction.
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unsigned LowBits = (*RelocPos + ResultPtr) & 65535;
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unsigned HighBits = *RelocPos & ~65535;
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*RelocPos = LowBits | HighBits; // Slam into low 16-bits
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break;
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}
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}
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}
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void PPC32JITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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EmitBranchToAt(Old, New, false);
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}
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