llvm-6502/include/llvm/Target
Jakob Stoklund Olesen b555609e73 Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."
This reverts commit 104654.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104660 91177308-0d34-0410-b5e6-96231b3b80d8
2010-05-26 01:21:14 +00:00
..
Mangler.h
SubtargetFeature.h
Target.td Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." 2010-05-26 01:21:14 +00:00
TargetAsmBackend.h
TargetAsmLexer.h
TargetAsmParser.h
TargetCallingConv.td
TargetData.h
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h
TargetInstrInfo.h Implement @llvm.returnaddress. rdar://8015977. 2010-05-22 01:47:14 +00:00
TargetInstrItineraries.h
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLowering.h Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode. 2010-05-20 23:26:43 +00:00
TargetLoweringObjectFile.h Add a new section and accessor for TLS data. 2010-05-22 00:00:58 +00:00
TargetMachine.h Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode. 2010-05-20 23:26:43 +00:00
TargetOpcodes.h
TargetOptions.h
TargetRegisterInfo.h Drop the SuperregHashTable. It is essentially the same as SubregHashTable. 2010-05-25 23:43:18 +00:00
TargetRegistry.h Currently, createMachOStreamer() is invoked directly in llvm-mc which 2010-05-21 12:54:43 +00:00
TargetSchedule.td
TargetSelect.h
TargetSelectionDAG.td
TargetSelectionDAGInfo.h
TargetSubtarget.h