llvm-6502/test/CodeGen/X86/fast-isel-fptrunc-fpext.ll
Andrea Di Biagio bd1729e5d4 [X86][FastIsel] Avoid introducing legacy SSE instructions if the target has AVX.
This patch teaches X86FastISel how to select AVX instructions for scalar
float/double convert operations.

Before this patch, X86FastISel always selected legacy SSE instructions
for FPExt (from float to double) and FPTrunc (from double to float).

For example:
\code
  define double @foo(float %f) {
    %conv = fpext float %f to double
    ret double %conv
  }
\end code

Before (with -mattr=+avx -fast-isel) X86FastIsel selected a CVTSS2SDrr which is
legacy SSE:
  cvtss2sd %xmm0, %xmm0

With this patch, X86FastIsel selects a VCVTSS2SDrr instead:
  vcvtss2sd %xmm0, %xmm0, %xmm0

Added test fast-isel-fptrunc-fpext.ll to check both the register-register and
the register-memory float/double conversion variants.

Differential Revision: http://reviews.llvm.org/D7438


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-10 12:04:41 +00:00

66 lines
1.7 KiB
LLVM

; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel | FileCheck %s --check-prefix=ALL --check-prefix=SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel | FileCheck %s --check-prefix=ALL --check-prefix=AVX
;
; Verify that fast-isel doesn't select legacy SSE instructions on targets that
; feature AVX.
;
; Test cases are obtained from the following code snippet:
; ///
; double single_to_double_rr(float x) {
; return (double)x;
; }
; float double_to_single_rr(double x) {
; return (float)x;
; }
; double single_to_double_rm(float *x) {
; return (double)*x;
; }
; float double_to_single_rm(double *x) {
; return (float)*x;
; }
; ///
define double @single_to_double_rr(float %x) {
; ALL-LABEL: single_to_double_rr:
; SSE-NOT: vcvtss2sd
; AVX: vcvtss2sd %xmm0, %xmm0, %xmm0
; ALL: ret
entry:
%conv = fpext float %x to double
ret double %conv
}
define float @double_to_single_rr(double %x) {
; ALL-LABEL: double_to_single_rr:
; SSE-NOT: vcvtsd2ss
; AVX: vcvtsd2ss %xmm0, %xmm0, %xmm0
; ALL: ret
entry:
%conv = fptrunc double %x to float
ret float %conv
}
define double @single_to_double_rm(float* %x) {
; ALL-LABEL: single_to_double_rm:
; SSE: cvtss2sd (%rdi), %xmm0
; AVX: vmovss (%rdi), %xmm0
; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; ALL-NEXT: ret
entry:
%0 = load float* %x, align 4
%conv = fpext float %0 to double
ret double %conv
}
define float @double_to_single_rm(double* %x) {
; ALL-LABEL: double_to_single_rm:
; SSE: cvtsd2ss (%rdi), %xmm0
; AVX: vmovsd (%rdi), %xmm0
; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
; ALL-NEXT: ret
entry:
%0 = load double* %x, align 8
%conv = fptrunc double %0 to float
ret float %conv
}