llvm-6502/test/CodeGen
Matt Arsenault e64a289609 R600/SI: Implement add i64, but do not yet enable.
Test doesn't actually check the output. I need
to fix add i64 being matched for the addressing
calculations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195040 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 20:09:47 +00:00
..
AArch64 Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors. 2013-11-18 06:31:53 +00:00
ARM [PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV. 2013-11-18 13:50:19 +00:00
CPP
Generic Error if we see an alias to a declaration. 2013-11-14 13:58:06 +00:00
Hexagon
Inputs
Mips [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code for (ConstantFP 0.0) 2013-11-18 13:12:43 +00:00
MSP430
NVPTX [NVPTX] Fix handling of indirect calls 2013-11-15 12:30:04 +00:00
PowerPC Avoid illegal integer promotion in fastisel 2013-11-15 19:09:27 +00:00
R600 R600/SI: Implement add i64, but do not yet enable. 2013-11-18 20:09:47 +00:00
SPARC [SparcV9] Handle i64 <-> float conversions in sparcv9 mode. 2013-11-03 12:28:40 +00:00
SystemZ
Thumb
Thumb2 Enable generating legacy IT block for AArch32 2013-11-13 18:29:49 +00:00
X86 Testcase for PR17964 2013-11-17 10:53:19 +00:00
XCore Error if we see an alias to a declaration. 2013-11-14 13:58:06 +00:00