llvm-6502/test/Transforms/InstCombine/2007-01-18-VectorInfLoop.ll
2007-01-18 22:16:03 +00:00

8 lines
243 B
LLVM

; RUN: llvm-as < %s | opt -instcombine -disable-output
define <4 x i32> %test(<4 x i32> %A) {
%B = xor <4 x i32> %A, < i32 -1, i32 -1, i32 -1, i32 -1 >
%C = and <4 x i32> %B, < i32 -1, i32 -1, i32 -1, i32 -1 >
ret <4 x i32> %C
}