llvm-6502/test/CodeGen
Evan Cheng 8c7ecaf524 Implement cond ? -1 : 0 with sbb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@94490 91177308-0d34-0410-b5e6-96231b3b80d8
2010-01-26 02:00:44 +00:00
..
Alpha
ARM Update test for darwin. 2010-01-25 15:32:10 +00:00
Blackfin
CBackend
CellSPU don't let asm-verbose break the check-next lines in these tests. 2010-01-19 06:39:54 +00:00
CPP
Generic just remove this test, it is not reduced, is not clear what its testing for and 2010-01-24 19:23:09 +00:00
Mips
MSP430 Reenable tests 2010-01-15 21:19:26 +00:00
PIC16 emit integer and fp zeros as (e.g.) .byte 0 instead of .space 1, 2010-01-20 07:19:19 +00:00
PowerPC Attempt to unbreak test on Linux. Chris, please check. 2010-01-25 00:54:13 +00:00
SPARC
SystemZ
Thumb Run the pre-register allocation tail duplication pass by default. Remove 2010-01-16 00:29:50 +00:00
Thumb2 Revert LoopStrengthReduce.cpp to pre-r94061 for now. 2010-01-22 00:46:49 +00:00
X86 Implement cond ? -1 : 0 with sbb. 2010-01-26 02:00:44 +00:00
XCore