Kevin Enderby 9c656450d6 Added the ParseInstruction() hook for target specific assembler directives so ... that things like .word can be parsed as target specific. Moved parsing .word out of AsmParser.cpp into X86AsmParser.cpp as it is 2 bytes on X86 and 4 bytes for other targets that support the .word directive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81461 91177308-0d34-0410-b5e6-96231b3b80d8		2009-09-10 20:51:44 +00:00
..
SubtargetFeature.h	Switch SubtargetFeature off of ostreams	2009-08-23 21:41:43 +00:00
Target.td
TargetAsmParser.h	Added the ParseInstruction() hook for target specific assembler directives so	2009-09-10 20:51:44 +00:00
TargetCallingConv.td
TargetData.h	Try again at privatizing the layout info map, with a rewritten patch.	2009-08-21 19:59:12 +00:00
TargetELFWriterInfo.h
TargetFrameInfo.h
TargetInstrDesc.h
TargetInstrInfo.h	rename TAI -> MAI, being careful not to make MAILJMP instructions :)	2009-08-22 21:43:10 +00:00
TargetInstrItineraries.h	Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.	2009-08-19 16:08:58 +00:00
TargetIntrinsicInfo.h
TargetJITInfo.h
TargetLowering.h	Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.	2009-09-02 08:44:58 +00:00
TargetLoweringObjectFile.h	Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.	2009-08-22 20:48:53 +00:00
TargetMachine.h	Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.	2009-08-22 20:48:53 +00:00
TargetMachOWriterInfo.h
TargetOptions.h
TargetRegisterInfo.h	Public and private corrections, warned about by icc (#304).	2009-09-06 08:55:57 +00:00
TargetRegistry.h	Added an abstract superclass, MCDisassembler, for	2009-09-09 22:49:13 +00:00
TargetSchedule.td
TargetSelect.h
TargetSelectionDAG.td
TargetSubtarget.h	Use the schedule itinerary operand use/def cycle information to adjust dependence edge latency for post-RA scheduling.	2009-08-19 16:08:58 +00:00