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16b794d25a
It is legal for an inline asm operand to use an earlyclobber register if the use operand is tied to the earlyclobber operand. The issue is discussed here: http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html We should perhaps let only the machine code verifier worry about these finer details. EarlyClobber operands are not really interesting to the scavenger. This fixes PR4528 for the third time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79122 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.8 KiB
LLVM
43 lines
1.8 KiB
LLVM
; RUN: llvm-as < %s | llc -march=arm
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; PR4528
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; Inline asm is allowed to contain operands "=&r", "0".
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%struct.device_dma_parameters = type { i32, i32 }
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%struct.iovec = type { i8*, i32 }
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define arm_aapcscc i32 @generic_segment_checks(%struct.iovec* nocapture %iov, i32* nocapture %nr_segs, i32* nocapture %count, i32 %access_flags) nounwind optsize {
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entry:
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br label %bb8
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bb: ; preds = %bb8
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br i1 undef, label %bb10, label %bb2
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bb2: ; preds = %bb
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%asmtmp = tail call %struct.device_dma_parameters asm "adds $1, $2, $3; sbcccs $1, $1, $0; movcc $0, #0", "=&r,=&r,r,Ir,0,~{cc}"(i8* undef, i32 undef, i32 0) nounwind; <%struct.device_dma_parameters> [#uses=1]
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%asmresult = extractvalue %struct.device_dma_parameters %asmtmp, 0; <i32> [#uses=1]
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%0 = icmp eq i32 %asmresult, 0 ; <i1> [#uses=1]
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br i1 %0, label %bb7, label %bb4
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bb4: ; preds = %bb2
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br i1 undef, label %bb10, label %bb9
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bb7: ; preds = %bb2
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%1 = add i32 %2, 1 ; <i32> [#uses=1]
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br label %bb8
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bb8: ; preds = %bb7, %entry
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%2 = phi i32 [ 0, %entry ], [ %1, %bb7 ] ; <i32> [#uses=3]
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%scevgep22 = getelementptr %struct.iovec* %iov, i32 %2, i32 0; <i8**> [#uses=0]
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%3 = load i32* %nr_segs, align 4 ; <i32> [#uses=1]
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%4 = icmp ult i32 %2, %3 ; <i1> [#uses=1]
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br i1 %4, label %bb, label %bb9
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bb9: ; preds = %bb8, %bb4
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store i32 undef, i32* %count, align 4
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ret i32 0
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bb10: ; preds = %bb4, %bb
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ret i32 0
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}
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