llvm-6502/test/MC/Disassembler
Johnny Chen e6d69e7dbe ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder was fooled.
Set the encoding bits to {0,?,?,0}, not 0.  Plus delegate the disassembly of ADR to
the more generic ADDri/SUBri instructions, and add a test case for that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128234 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-24 20:42:48 +00:00
..
ARM ADR was added with the wrong encoding for inst{24-21}, and the ARM decoder was fooled. 2011-03-24 20:42:48 +00:00
MBlaze Teach the MBlaze disassembler to disassemble special purpose registers. 2010-12-20 21:18:04 +00:00
X86 Basic sanity checks to ensure that 2- and 3-byte 2011-03-15 01:32:46 +00:00