mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-16 11:05:54 +00:00
e721f5c8d3
if (x != 0) x = 1
if (x == 1) x = 1
Previous codegen looks like this:
mov r1, r0
cmp r1, #1
mov r0, #0
moveq r0, #1
The naive lowering select between two different values. It should recognize the
test is equality test so it's more a conditional move rather than a select:
cmp r0, #1
movne r0, #0
rdar://9758317
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135017 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
1.3 KiB
LLVM
59 lines
1.3 KiB
LLVM
; RUN: llc < %s -march=thumb -mattr=+thumb2 -join-physregs | FileCheck %s
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; These tests implicitly depend on 'movs r0, #0' being rematerialized below the
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; tst as 'mov.w r0, #0'. So far, that requires physreg joining.
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define i1 @f2(i32 %a, i32 %b) {
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; CHECK: f2
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; CHECK: teq.w r0, r1
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%tmp = xor i32 %a, %b
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%tmp1 = icmp eq i32 %tmp, 0
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ret i1 %tmp1
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}
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define i1 @f4(i32 %a, i32 %b) {
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; CHECK: f4
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; CHECK: teq.w r0, r1
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%tmp = xor i32 %a, %b
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%tmp1 = icmp eq i32 0, %tmp
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ret i1 %tmp1
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}
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define i1 @f6(i32 %a, i32 %b) {
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; CHECK: f6
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; CHECK: teq.w r0, r1, lsl #5
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%tmp = shl i32 %b, 5
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%tmp1 = xor i32 %a, %tmp
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%tmp2 = icmp eq i32 %tmp1, 0
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ret i1 %tmp2
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}
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define i1 @f7(i32 %a, i32 %b) {
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; CHECK: f7
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; CHECK: teq.w r0, r1, lsr #6
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%tmp = lshr i32 %b, 6
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%tmp1 = xor i32 %a, %tmp
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%tmp2 = icmp eq i32 %tmp1, 0
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ret i1 %tmp2
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}
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define i1 @f8(i32 %a, i32 %b) {
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; CHECK: f8
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; CHECK: teq.w r0, r1, asr #7
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%tmp = ashr i32 %b, 7
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%tmp1 = xor i32 %a, %tmp
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%tmp2 = icmp eq i32 %tmp1, 0
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ret i1 %tmp2
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}
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define i1 @f9(i32 %a, i32 %b) {
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; CHECK: f9
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; CHECK: teq.w r0, r0, ror #8
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%l8 = shl i32 %a, 24
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%r8 = lshr i32 %a, 8
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%tmp = or i32 %l8, %r8
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%tmp1 = xor i32 %a, %tmp
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%tmp2 = icmp eq i32 %tmp1, 0
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ret i1 %tmp2
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}
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