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https://github.com/c64scene-ar/llvm-6502.git
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fa566d02cc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161095 91177308-0d34-0410-b5e6-96231b3b80d8
139 lines
4.8 KiB
C++
139 lines
4.8 KiB
C++
//===-- MipsSERegisterInfo.cpp - MIPS32/64 Register Information -== -------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the MIPS32/64 implementation of the TargetRegisterInfo
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// class.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsSERegisterInfo.h"
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#include "Mips.h"
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#include "MipsAnalyzeImmediate.h"
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#include "MipsSEInstrInfo.h"
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#include "MipsSubtarget.h"
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#include "MipsMachineFunction.h"
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#include "llvm/Constants.h"
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#include "llvm/DebugInfo.h"
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#include "llvm/Type.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/STLExtras.h"
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using namespace llvm;
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MipsSERegisterInfo::MipsSERegisterInfo(const MipsSubtarget &ST,
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const TargetInstrInfo &TII)
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: MipsRegisterInfo(ST, TII) {}
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// This function eliminate ADJCALLSTACKDOWN,
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// ADJCALLSTACKUP pseudo instructions
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void MipsSERegisterInfo::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
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if (!TFI->hasReservedCallFrame(MF)) {
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int64_t Amount = I->getOperand(0).getImm();
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if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
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Amount = -Amount;
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const MipsSEInstrInfo *II = static_cast<const MipsSEInstrInfo*>(&TII);
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unsigned SP = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
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II->adjustStackPtr(SP, Amount, MBB, I);
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}
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MBB.erase(I);
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}
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void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
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unsigned OpNo, int FrameIndex,
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uint64_t StackSize,
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int64_t SPOffset) const {
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MachineInstr &MI = *II;
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MachineFunction &MF = *MI.getParent()->getParent();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
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const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
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int MinCSFI = 0;
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int MaxCSFI = -1;
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if (CSI.size()) {
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MinCSFI = CSI[0].getFrameIdx();
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MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
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}
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// The following stack frame objects are always referenced relative to $sp:
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// 1. Outgoing arguments.
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// 2. Pointer to dynamically allocated stack space.
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// 3. Locations for callee-saved registers.
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// Everything else is referenced relative to whatever register
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// getFrameRegister() returns.
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unsigned FrameReg;
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if (MipsFI->isOutArgFI(FrameIndex) ||
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(FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI))
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FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
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else
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FrameReg = getFrameRegister(MF);
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// Calculate final offset.
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// - There is no need to change the offset if the frame object is one of the
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// following: an outgoing argument, pointer to a dynamically allocated
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// stack space or a $gp restore location,
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// - If the frame object is any of the following, its offset must be adjusted
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// by adding the size of the stack:
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// incoming argument, callee-saved register location or local variable.
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int64_t Offset;
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if (MipsFI->isOutArgFI(FrameIndex))
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Offset = SPOffset;
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else
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Offset = SPOffset + (int64_t)StackSize;
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Offset += MI.getOperand(OpNo + 1).getImm();
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DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n");
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// If MI is not a debug value, make sure Offset fits in the 16-bit immediate
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// field.
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if (!MI.isDebugValue() && !isInt<16>(Offset)) {
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MachineBasicBlock &MBB = *MI.getParent();
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DebugLoc DL = II->getDebugLoc();
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unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
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unsigned ATReg = Subtarget.isABI_N64() ? Mips::AT_64 : Mips::AT;
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MipsAnalyzeImmediate::Inst LastInst(0, 0);
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MipsFI->setEmitNOAT();
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Mips::loadImmediate(Offset, Subtarget.isABI_N64(), TII, MBB, II, DL, true,
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&LastInst);
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BuildMI(MBB, II, DL, TII.get(ADDu), ATReg).addReg(FrameReg).addReg(ATReg);
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FrameReg = ATReg;
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Offset = SignExtend64<16>(LastInst.ImmOpnd);
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}
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MI.getOperand(OpNo).ChangeToRegister(FrameReg, false);
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MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);
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}
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