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Patch by Ana Pazos. - Completed implementation of instruction formats: AdvSIMD three same AdvSIMD modified immediate AdvSIMD scalar pairwise - Completed implementation of instruction classes (some of the instructions in these classes belong to yet unfinished instruction formats): Vector Arithmetic Vector Immediate Vector Pairwise Arithmetic - Initial implementation of instruction formats: AdvSIMD scalar two-reg misc AdvSIMD scalar three same - Intial implementation of instruction class: Scalar Arithmetic - Initial clang changes to support arm v8 intrinsics. Note: no clang changes for scalar intrinsics function name mangling yet. - Comprehensive test cases for added instructions To verify auto codegen, encoding, decoding, diagnosis, intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187567 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AsmParser | ||
Disassembler | ||
InstPrinter | ||
MCTargetDesc | ||
TargetInfo | ||
Utils | ||
AArch64.h | ||
AArch64.td | ||
AArch64AsmPrinter.cpp | ||
AArch64AsmPrinter.h | ||
AArch64BranchFixupPass.cpp | ||
AArch64CallingConv.td | ||
AArch64FrameLowering.cpp | ||
AArch64FrameLowering.h | ||
AArch64InstrFormats.td | ||
AArch64InstrInfo.cpp | ||
AArch64InstrInfo.h | ||
AArch64InstrInfo.td | ||
AArch64InstrNEON.td | ||
AArch64ISelDAGToDAG.cpp | ||
AArch64ISelLowering.cpp | ||
AArch64ISelLowering.h | ||
AArch64MachineFunctionInfo.cpp | ||
AArch64MachineFunctionInfo.h | ||
AArch64MCInstLower.cpp | ||
AArch64RegisterInfo.cpp | ||
AArch64RegisterInfo.h | ||
AArch64RegisterInfo.td | ||
AArch64Schedule.td | ||
AArch64SelectionDAGInfo.cpp | ||
AArch64SelectionDAGInfo.h | ||
AArch64Subtarget.cpp | ||
AArch64Subtarget.h | ||
AArch64TargetMachine.cpp | ||
AArch64TargetMachine.h | ||
AArch64TargetObjectFile.cpp | ||
AArch64TargetObjectFile.h | ||
CMakeLists.txt | ||
LLVMBuild.txt | ||
Makefile | ||
README.txt |
This file will contain changes that need to be made before AArch64 can become an officially supported target. Currently a placeholder.