Jim Laskey ce72b1755f Reorg for integration with gcc4. Old style debug info will not be passed though ... to SelIDAG. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26115 91177308-0d34-0410-b5e6-96231b3b80d8		2006-02-11 01:01:30 +00:00
..
SelectionDAG	Reorg for integration with gcc4. Old style debug info will not be passed though	2006-02-11 01:01:30 +00:00
AsmPrinter.cpp	Adjust to MachineConstantPool interface change: instead of keeping a	2006-02-09 04:46:04 +00:00
BranchFolding.cpp
DwarfWriter.cpp	Changing model for the construction of debug information.	2006-02-06 15:33:21 +00:00
ELFWriter.cpp	add these so I can be less naughty	2005-12-28 06:29:02 +00:00
IntrinsicLowering.cpp	For PR411:	2006-01-16 21:12:35 +00:00
LiveInterval.cpp
LiveIntervalAnalysis.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
LiveVariables.cpp	Add a LiveVariables::VarInfo::dump method	2006-01-04 05:40:30 +00:00
MachineBasicBlock.cpp
MachineCodeEmitter.cpp	mixed-STL programs are big and nasty :(	2005-12-28 02:44:35 +00:00
MachineDebugInfo.cpp	Reorg for integration with gcc4. Old style debug info will not be passed though	2006-02-11 01:01:30 +00:00
MachineFunction.cpp	Adjust to MachineConstantPool interface change: instead of keeping a	2006-02-09 04:46:04 +00:00
MachineInstr.cpp
Makefile
Passes.cpp
PHIElimination.cpp	Add support for targets (like Alpha) that have terminator instructions which	2006-01-04 07:12:21 +00:00
PhysRegTracker.h
PrologEpilogInserter.cpp
RegAllocLinearScan.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
RegAllocLocal.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
RegAllocSimple.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
TwoAddressInstructionPass.cpp	Add explicit #includes of <iostream>	2006-01-22 23:41:00 +00:00
UnreachableBlockElim.cpp
VirtRegMap.cpp	Fix VC++ warning.	2006-02-04 03:27:39 +00:00
VirtRegMap.h