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73f50d9bc3
into XXXGenRegisterInfo.inc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133922 91177308-0d34-0410-b5e6-96231b3b80d8
24 lines
713 B
Makefile
24 lines
713 B
Makefile
##===- lib/Target/XCore/Makefile ---------------------------*- Makefile -*-===##
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#
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# The LLVM Compiler Infrastructure
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#
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# This file is distributed under the University of Illinois Open Source
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# License. See LICENSE.TXT for details.
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#
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##===----------------------------------------------------------------------===##
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LEVEL = ../../..
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LIBRARYNAME = LLVMXCoreCodeGen
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TARGET = XCore
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# Make sure that tblgen is run, first thing.
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BUILT_SOURCES = XCoreGenRegisterInfo.inc XCoreGenInstrNames.inc \
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XCoreGenInstrInfo.inc XCoreGenAsmWriter.inc \
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XCoreGenDAGISel.inc XCoreGenCallingConv.inc \
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XCoreGenSubtarget.inc
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DIRS = TargetInfo
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include $(LEVEL)/Makefile.common
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