Juergen Ributzka 2c68cde701 [FastISel][AArch64] Fix shift lowering for i8 and i16 value types. ... This fix changes the parameters #r and #s that are passed to the UBFM/SBFM instruction to get the zero/sign-extension for free. The original problem was that the shift left would use the 32-bit shift even for i8/i16 value types, which could leave the upper bits set with "garbage" values. The arithmetic shift right on the other side would use the wrong MSB as sign-bit to determine what bits to shift into the value. This fixes <rdar://problem/17907720>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214788 91177308-0d34-0410-b5e6-96231b3b80d8		2014-08-04 21:49:51 +00:00
..
Analysis
AsmParser
Bitcode	UseListOrder: Fix blockaddress use-list order	2014-08-01 22:27:19 +00:00
CodeGen	[SDAG] Fix a really, really terrible bug in the DAG combiner.	2014-08-04 21:29:59 +00:00
DebugInfo
ExecutionEngine	Remove the TargetMachine forwards for TargetSubtargetInfo based	2014-08-04 21:25:23 +00:00
IR	Reapply "DebugInfo: Ensure that all debug location scope chains from instructions within a function, lead to the function itself."	2014-08-04 19:30:08 +00:00
IRReader
LineEditor
Linker
LTO	Remove the TargetMachine forwards for TargetSubtargetInfo based	2014-08-04 21:25:23 +00:00
MC	MC: virtualise EmitWindowsUnwindTables	2014-08-03 18:51:26 +00:00
Object
Option
ProfileData	Coverage: add HasCodeBefore flag to a mapping region.	2014-08-04 18:00:51 +00:00
Support	Path: Stop claiming path::const_iterator is bidirectional	2014-08-04 17:36:41 +00:00
TableGen
Target	[FastISel][AArch64] Fix shift lowering for i8 and i16 value types.	2014-08-04 21:49:51 +00:00
Transforms	[SimplifyCFG] fix accessing deleted PHINodes in switch-to-table conversion.	2014-08-02 23:41:54 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile