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https://github.com/c64scene-ar/llvm-6502.git
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c308f165a0
This is so that EF_MIPS_NAN2008 is set if we are using IEEE 754-2008 NaN encoding (-mnan=2008). This patch also adds support for parsing '.nan legacy' and '.nan 2008' assembly directives. The handling of these directives should match GAS' behaviour i.e., the last directive in use sets the ELF header bit (EF_MIPS_NAN2008). Differential Revision: http://reviews.llvm.org/D3346 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206396 91177308-0d34-0410-b5e6-96231b3b80d8
405 lines
12 KiB
C++
405 lines
12 KiB
C++
//===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Mips specific target streamer methods.
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//
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//===----------------------------------------------------------------------===//
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#include "InstPrinter/MipsInstPrinter.h"
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#include "MipsMCTargetDesc.h"
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#include "MipsTargetObjectFile.h"
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#include "MipsTargetStreamer.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCELF.h"
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#include "llvm/MC/MCSectionELF.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/ELF.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/FormattedStream.h"
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using namespace llvm;
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// Pin vtable to this file.
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void MipsTargetStreamer::anchor() {}
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MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
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MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
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formatted_raw_ostream &OS)
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: MipsTargetStreamer(S), OS(OS) {}
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void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
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OS << "\t.set\tmicromips\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
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OS << "\t.set\tnomicromips\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
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OS << "\t.set\tmips16\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
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OS << "\t.set\tnomips16\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
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OS << "\t.set\treorder\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
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OS << "\t.set\tnoreorder\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
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OS << "\t.set\tmacro\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
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OS << "\t.set\tnomacro\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetAt() {
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OS << "\t.set\tat\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
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OS << "\t.set\tnoat\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
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OS << "\t.end\t" << Name << '\n';
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}
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void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
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OS << "\t.ent\t" << Symbol.getName() << '\n';
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}
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void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
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void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
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void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
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OS << "\t.nan\tlegacy\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
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OS << "\t.option\tpic0\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
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OS << "\t.option\tpic2\n";
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}
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void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
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unsigned ReturnReg) {
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OS << "\t.frame\t$"
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<< StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
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<< StackSize << ",$"
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<< StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
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OS << "\t.set\tmips32r2\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
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OS << "\t.set\tmips64\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
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OS << "\t.set\tmips64r2\n";
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}
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void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
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OS << "\t.set\tdsp\n";
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}
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// Print a 32 bit hex number with all numbers.
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static void printHex32(unsigned Value, raw_ostream &OS) {
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OS << "0x";
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for (int i = 7; i >= 0; i--)
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OS.write_hex((Value & (0xF << (i*4))) >> (i*4));
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}
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void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
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int CPUTopSavedRegOff) {
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OS << "\t.mask \t";
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printHex32(CPUBitmask, OS);
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OS << ',' << CPUTopSavedRegOff << '\n';
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}
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void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
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int FPUTopSavedRegOff) {
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OS << "\t.fmask\t";
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printHex32(FPUBitmask, OS);
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OS << "," << FPUTopSavedRegOff << '\n';
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}
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// This part is for ELF object output.
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MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
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const MCSubtargetInfo &STI)
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: MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
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MCAssembler &MCA = getStreamer().getAssembler();
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uint64_t Features = STI.getFeatureBits();
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Triple T(STI.getTargetTriple());
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Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
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? true
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: false;
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// Update e_header flags
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unsigned EFlags = 0;
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// Architecture
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if (Features & Mips::FeatureMips64r2)
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EFlags |= ELF::EF_MIPS_ARCH_64R2;
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else if (Features & Mips::FeatureMips64)
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EFlags |= ELF::EF_MIPS_ARCH_64;
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else if (Features & Mips::FeatureMips4)
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EFlags |= ELF::EF_MIPS_ARCH_4;
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else if (Features & Mips::FeatureMips32r2)
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EFlags |= ELF::EF_MIPS_ARCH_32R2;
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else if (Features & Mips::FeatureMips32)
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EFlags |= ELF::EF_MIPS_ARCH_32;
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if (T.isArch64Bit()) {
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if (Features & Mips::FeatureN32)
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EFlags |= ELF::EF_MIPS_ABI2;
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else if (Features & Mips::FeatureO32) {
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EFlags |= ELF::EF_MIPS_ABI_O32;
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EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
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}
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// No need to set any bit for N64 which is the default ABI at the moment
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// for 64-bit Mips architectures.
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} else {
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if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
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EFlags |= ELF::EF_MIPS_32BITMODE;
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// ABI
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EFlags |= ELF::EF_MIPS_ABI_O32;
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}
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// Other options.
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if (Features & Mips::FeatureNaN2008)
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EFlags |= ELF::EF_MIPS_NAN2008;
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MCA.setELFHeaderEFlags(EFlags);
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}
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void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
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if (!isMicroMipsEnabled())
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return;
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MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
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uint8_t Type = MCELF::GetType(Data);
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if (Type != ELF::STT_FUNC)
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return;
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// The "other" values are stored in the last 6 bits of the second byte
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// The traditional defines for STO values assume the full byte and thus
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// the shift to pack it.
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MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
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}
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void MipsTargetELFStreamer::finish() {
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MCAssembler &MCA = getStreamer().getAssembler();
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MCContext &Context = MCA.getContext();
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MCStreamer &OS = getStreamer();
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Triple T(STI.getTargetTriple());
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uint64_t Features = STI.getFeatureBits();
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if (T.isArch64Bit() && (Features & Mips::FeatureN64)) {
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const MCSectionELF *Sec = Context.getELFSection(
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".MIPS.options", ELF::SHT_MIPS_OPTIONS,
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ELF::SHF_ALLOC | ELF::SHF_MIPS_NOSTRIP, SectionKind::getMetadata());
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OS.SwitchSection(Sec);
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OS.EmitIntValue(1, 1); // kind
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OS.EmitIntValue(40, 1); // size
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OS.EmitIntValue(0, 2); // section
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OS.EmitIntValue(0, 4); // info
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OS.EmitIntValue(0, 4); // ri_gprmask
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OS.EmitIntValue(0, 4); // pad
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OS.EmitIntValue(0, 4); // ri_cpr[0]mask
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OS.EmitIntValue(0, 4); // ri_cpr[1]mask
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OS.EmitIntValue(0, 4); // ri_cpr[2]mask
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OS.EmitIntValue(0, 4); // ri_cpr[3]mask
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OS.EmitIntValue(0, 8); // ri_gp_value
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} else {
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const MCSectionELF *Sec =
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Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO, ELF::SHF_ALLOC,
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SectionKind::getMetadata());
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OS.SwitchSection(Sec);
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OS.EmitIntValue(0, 4); // ri_gprmask
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OS.EmitIntValue(0, 4); // ri_cpr[0]mask
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OS.EmitIntValue(0, 4); // ri_cpr[1]mask
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OS.EmitIntValue(0, 4); // ri_cpr[2]mask
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OS.EmitIntValue(0, 4); // ri_cpr[3]mask
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OS.EmitIntValue(0, 4); // ri_gp_value
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}
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}
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void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
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const MCExpr *Value) {
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// If on rhs is micromips symbol then mark Symbol as microMips.
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if (Value->getKind() != MCExpr::SymbolRef)
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return;
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const MCSymbol &RhsSym =
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static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
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MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
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uint8_t Type = MCELF::GetType(Data);
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if ((Type != ELF::STT_FUNC)
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|| !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
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return;
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MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
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// The "other" values are stored in the last 6 bits of the second byte.
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// The traditional defines for STO values assume the full byte and thus
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// the shift to pack it.
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MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
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}
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MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
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return static_cast<MCELFStreamer &>(Streamer);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
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MicroMipsEnabled = true;
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_MICROMIPS;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
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MicroMipsEnabled = false;
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips16() {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveSetReorder() {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_NOREORDER;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMacro() {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveSetAt() {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitDirectiveNaN2008() {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_NAN2008;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags &= ~ELF::EF_MIPS_NAN2008;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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// This option overrides other PIC options like -KPIC.
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Pic = false;
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Flags &= ~ELF::EF_MIPS_PIC;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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Pic = true;
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// NOTE: We are following the GAS behaviour here which means the directive
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// 'pic2' also sets the CPIC bit in the ELF header. This is different from
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// what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
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// EF_MIPS_CPIC to be mutually exclusive.
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Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
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MCA.setELFHeaderEFlags(Flags);
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}
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void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
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unsigned ReturnReg) {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
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int CPUTopSavedRegOff) {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
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int FPUTopSavedRegOff) {
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// FIXME: implement.
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
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// No action required for ELF output.
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips64() {
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// No action required for ELF output.
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
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// No action required for ELF output.
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}
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void MipsTargetELFStreamer::emitDirectiveSetDsp() {
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// No action required for ELF output.
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}
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