llvm-6502/lib/CodeGen/SelectionDAG
Owen Anderson 4a9f150926 When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore,
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-20 20:39:59 +00:00
..
CMakeLists.txt Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally." 2010-09-13 23:59:48 +00:00
DAGCombiner.cpp When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, 2010-09-20 20:39:59 +00:00
FastISel.cpp Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument. 2010-09-14 20:29:31 +00:00
FunctionLoweringInfo.cpp Reapply r112623. Included additional check for unused byval argument. 2010-08-31 22:22:42 +00:00
InstrEmitter.cpp Revert r112461. It was failing on PPC... 2010-08-30 04:36:50 +00:00
InstrEmitter.h
LegalizeDAG.cpp Add a missing check when legalizing a vector extending load. This doesn't 2010-09-03 19:20:37 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp
LegalizeTypes.cpp
LegalizeTypes.h implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1. 2010-08-26 05:51:22 +00:00
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp implement SplitVecOp_CONCAT_VECTORS, fixing the included testcase with SSE1. 2010-08-26 05:51:22 +00:00
Makefile
ScheduleDAGFast.cpp Make fast scheduler handle asm clobbers correctly. 2010-08-17 22:17:24 +00:00
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp The "excess register pressure" returned by HighRegPressure() is not accurate enough to factor into scheduling priority. Eliminate it and add early exits to speed up scheduling. 2010-07-26 21:49:07 +00:00
ScheduleDAGSDNodes.cpp Teach if-converter to be more careful with predicating instructions that would 2010-09-10 01:29:16 +00:00
ScheduleDAGSDNodes.h Teach if-converter to be more careful with predicating instructions that would 2010-09-10 01:29:16 +00:00
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is 2010-09-18 04:45:14 +00:00
SelectionDAGBuilder.cpp Check bb to ensure that alloca is in separate basic block. 2010-09-15 18:13:55 +00:00
SelectionDAGBuilder.h Offset is not always unsigned number. 2010-08-31 06:12:08 +00:00
SelectionDAGISel.cpp implement rdar://6653118 - fastisel should fold loads where possible. 2010-09-05 02:18:34 +00:00
SelectionDAGPrinter.cpp Eliminate unnecessary empty string literals. 2010-08-04 01:39:08 +00:00
TargetLowering.cpp Silence more warnings. Two more unused variables. 2010-09-13 18:30:57 +00:00
TargetSelectionDAGInfo.cpp