Tim Northover e90d4e2c69 AArch64/ARM64: enable directcond.ll test on ARM64. ... Code change is because optimizeCompareInstr didn't know how to pull the condition code out of FCSEL instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206171 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-14 12:51:06 +00:00
..
AArch64	AArch64/ARM64: enable directcond.ll test on ARM64.	2014-04-14 12:51:06 +00:00
ARM	Add extra checks to mvn.ll test to prevent the "f1" check from matching	2014-04-12 04:47:04 +00:00
ARM64	Add the ability to use GEPs for address sinking in CGP	2014-04-12 00:59:48 +00:00
CPP
Generic
Hexagon
Inputs
Mips
MSP430
NVPTX	[NVPTX] Add preliminary intrinsics and codegen support for textures/surfaces	2014-04-09 15:39:15 +00:00
PowerPC	[PowerPC] Fix rlwimi isel when mask is not constant	2014-04-13 17:10:58 +00:00
R600	SelectionDAG: Use helper function to improve legalization of ISD::MUL	2014-04-11 16:12:01 +00:00
SPARC
SystemZ	Reenable use of TBAA during CodeGen	2014-04-12 01:26:00 +00:00
Thumb	Move the segmented stack switch to a function attribute	2014-04-10 22:58:43 +00:00
Thumb2	Move the segmented stack switch to a function attribute	2014-04-10 22:58:43 +00:00
X86	Add the ability to use GEPs for address sinking in CGP	2014-04-12 00:59:48 +00:00
XCore	[XCore] Don't create invalid MKMSK instructions inside loadImmediate().	2014-04-14 12:30:35 +00:00