Matthias Braun e942914d29 ARM: Thumb2 LDRD/STRD supports independent input/output regs ... The existing code would unnecessarily break LDRD/STRD apart with non-adjacent registers, on thumb2 this is not necessary. Ideally on thumb2 we shouldn't match for ldrd/strd pre-regalloc anymore as there is not reason to set register hints anymore, changing that is something for a future patch however. Differential Revision: http://reviews.llvm.org/D9694 Recommiting after the revert in r238821, the buildbot still failed with the patch removed so there seems to be another reason for the breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238935 91177308-0d34-0410-b5e6-96231b3b80d8		2015-06-03 16:30:24 +00:00
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Analysis
AsmParser
Bitcode	[BitcodeReader] Diagnose type mismatches with aliases	2015-06-03 01:30:13 +00:00
CodeGen
DebugInfo
ExecutionEngine	Re-commit r238838, r238844 with fix for host/target endian mismatch and windows buildbot.	2015-06-03 10:27:28 +00:00
Fuzzer
IR	Int128 is also a built-in preconstructed type.	2015-06-02 23:56:53 +00:00
IRReader
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Object	Move to llvm-objdump a large amount of code to that is only used there.	2015-06-03 04:48:06 +00:00
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Target	ARM: Thumb2 LDRD/STRD supports independent input/output regs	2015-06-03 16:30:24 +00:00
Transforms	Remove stray semicolon. NFC.	2015-06-03 08:51:30 +00:00
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