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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
71 lines
2.7 KiB
LLVM
71 lines
2.7 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
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declare i32 @llvm.r600.read.tidig.x() nounwind readnone
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; SI-LABEL: {{^}}fp_to_uint_i32_f64:
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; SI: v_cvt_u32_f64_e32
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define void @fp_to_uint_i32_f64(i32 addrspace(1)* %out, double %in) {
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%cast = fptoui double %in to i32
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store i32 %cast, i32 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: @fp_to_uint_v2i32_v2f64
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; SI: v_cvt_u32_f64_e32
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; SI: v_cvt_u32_f64_e32
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define void @fp_to_uint_v2i32_v2f64(<2 x i32> addrspace(1)* %out, <2 x double> %in) {
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%cast = fptoui <2 x double> %in to <2 x i32>
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store <2 x i32> %cast, <2 x i32> addrspace(1)* %out, align 8
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ret void
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}
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; SI-LABEL: @fp_to_uint_v4i32_v4f64
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; SI: v_cvt_u32_f64_e32
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; SI: v_cvt_u32_f64_e32
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; SI: v_cvt_u32_f64_e32
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; SI: v_cvt_u32_f64_e32
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define void @fp_to_uint_v4i32_v4f64(<4 x i32> addrspace(1)* %out, <4 x double> %in) {
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%cast = fptoui <4 x double> %in to <4 x i32>
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store <4 x i32> %cast, <4 x i32> addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: @fp_to_uint_i64_f64
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; CI-DAG: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
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; CI-DAG: v_trunc_f64_e32 [[TRUNC:v\[[0-9]+:[0-9]+\]]], [[VAL]]
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; CI-DAG: s_mov_b32 s[[K0_LO:[0-9]+]], 0{{$}}
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; CI-DAG: s_mov_b32 s[[K0_HI:[0-9]+]], 0x3df00000
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; CI-DAG: v_mul_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[VAL]], s{{\[}}[[K0_LO]]:[[K0_HI]]{{\]}}
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; CI-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[MUL]]
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; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000
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; CI-DAG: v_fma_f64 [[FMA:v\[[0-9]+:[0-9]+\]]], [[FLOOR]], s{{\[[0-9]+}}:[[K1_HI]]{{\]}}, [[TRUNC]]
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; CI-DAG: v_cvt_u32_f64_e32 v[[LO:[0-9]+]], [[FMA]]
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; CI-DAG: v_cvt_u32_f64_e32 v[[HI:[0-9]+]], [[FLOOR]]
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; CI: buffer_store_dwordx2 v{{\[}}[[LO]]:[[HI]]{{\]}}
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define void @fp_to_uint_i64_f64(i64 addrspace(1)* %out, double addrspace(1)* %in) {
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%tid = call i32 @llvm.r600.read.tidig.x() nounwind readnone
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%gep = getelementptr double, double addrspace(1)* %in, i32 %tid
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%val = load double, double addrspace(1)* %gep, align 8
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%cast = fptoui double %val to i64
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store i64 %cast, i64 addrspace(1)* %out, align 4
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ret void
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}
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; SI-LABEL: @fp_to_uint_v2i64_v2f64
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define void @fp_to_uint_v2i64_v2f64(<2 x i64> addrspace(1)* %out, <2 x double> %in) {
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%cast = fptoui <2 x double> %in to <2 x i64>
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store <2 x i64> %cast, <2 x i64> addrspace(1)* %out, align 16
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ret void
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}
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; SI-LABEL: @fp_to_uint_v4i64_v4f64
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define void @fp_to_uint_v4i64_v4f64(<4 x i64> addrspace(1)* %out, <4 x double> %in) {
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%cast = fptoui <4 x double> %in to <4 x i64>
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store <4 x i64> %cast, <4 x i64> addrspace(1)* %out, align 32
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ret void
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}
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