mirror of
https://github.com/c64scene-ar/llvm-6502.git
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56077f5796
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218776 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
2.1 KiB
LLVM
48 lines
2.1 KiB
LLVM
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
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; Normally icmp + select is optimized to select_cc, when this happens the
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; DAGLegalizer never sees the select and doesn't have a chance to leaglize it.
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;
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; In order to avoid the select_cc optimization, this test case calculates the
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; condition for the select in a separate basic block.
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; FUNC-LABEL: {{^}}select:
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; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.X
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; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.X
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; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
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; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY
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; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XYZW
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; EG-DAG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XYZW
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define void @select (i32 addrspace(1)* %i32out, float addrspace(1)* %f32out,
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<2 x i32> addrspace(1)* %v2i32out, <2 x float> addrspace(1)* %v2f32out,
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<4 x i32> addrspace(1)* %v4i32out, <4 x float> addrspace(1)* %v4f32out,
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i32 %cond) {
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entry:
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br label %for
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body:
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%inc = add i32 %i, 1
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%br_cmp.i = icmp eq i1 %br_cmp, 0
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br label %for
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for:
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%i = phi i32 [ %inc, %body], [ 0, %entry ]
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%br_cmp = phi i1 [ %br_cmp.i, %body ], [ 0, %entry ]
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%0 = icmp eq i32 %cond, %i
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%1 = select i1 %br_cmp, i32 2, i32 3
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%2 = select i1 %br_cmp, float 2.0 , float 5.0
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%3 = select i1 %br_cmp, <2 x i32> <i32 2, i32 3>, <2 x i32> <i32 4, i32 5>
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%4 = select i1 %br_cmp, <2 x float> <float 2.0, float 3.0>, <2 x float> <float 4.0, float 5.0>
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%5 = select i1 %br_cmp, <4 x i32> <i32 2 , i32 3, i32 4, i32 5>, <4 x i32> <i32 6, i32 7, i32 8, i32 9>
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%6 = select i1 %br_cmp, <4 x float> <float 2.0, float 3.0, float 4.0, float 5.0>, <4 x float> <float 6.0, float 7.0, float 8.0, float 9.0>
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br i1 %0, label %body, label %done
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done:
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store i32 %1, i32 addrspace(1)* %i32out
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store float %2, float addrspace(1)* %f32out
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store <2 x i32> %3, <2 x i32> addrspace(1)* %v2i32out
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store <2 x float> %4, <2 x float> addrspace(1)* %v2f32out
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store <4 x i32> %5, <4 x i32> addrspace(1)* %v4i32out
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store <4 x float> %6, <4 x float> addrspace(1)* %v4f32out
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ret void
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}
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