llvm-6502/utils/TableGen
Chad Rosier 2590c2e1e9 Rather then have a wrapper function, have tblgen instantiate the implementation.
Also remove an unused argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-24 22:57:55 +00:00
..
AsmMatcherEmitter.cpp Rather then have a wrapper function, have tblgen instantiate the implementation. 2012-09-24 22:57:55 +00:00
AsmWriterEmitter.cpp Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed. 2012-09-15 01:22:42 +00:00
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CMakeLists.txt
CodeEmitterGen.cpp Re-work bit/bits value resolving in tblgen 2012-09-06 23:32:48 +00:00
CodeGenDAGPatterns.cpp Soften the pattern-can-never-match error in TableGen into a warning. This pattern can be very useful in cases where you want to define a multiclass that covers both commutative and non-commutative operators (say, add and sub). 2012-09-19 22:15:06 +00:00
CodeGenDAGPatterns.h Refactor Record* by-ID comparator to Record.h 2012-09-19 01:47:00 +00:00
CodeGenInstruction.cpp Improve tblgen code cleanliness: create an unknown_class, from which the unknown def inherits. Make tblgen check for that class, rather than checking for the def itself. 2012-09-11 23:47:08 +00:00
CodeGenInstruction.h Heed guessInstructionProperties, and stop warning on redundant flags. 2012-08-24 00:31:16 +00:00
CodeGenIntrinsics.h
CodeGenRegisters.cpp Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name. 2012-09-11 23:32:17 +00:00
CodeGenRegisters.h Compute a map from register names to registers, rather than scanning the list of registers every time we want to look up a register by name. 2012-09-11 23:32:17 +00:00
CodeGenSchedule.cpp Machine Model (-schedmodel only). Added SchedAliases. 2012-09-22 02:24:21 +00:00
CodeGenSchedule.h Machine Model (-schedmodel only). Added SchedAliases. 2012-09-22 02:24:21 +00:00
CodeGenTarget.cpp Add in new data types that are used by AMDIL/ANL among others. 2012-09-19 22:47:07 +00:00
CodeGenTarget.h Add CodeGenTarget::guessInstructionProperties. 2012-08-23 19:34:41 +00:00
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp Add 'virtual' keywoards to output file for overridden functions. 2012-09-16 18:25:36 +00:00
DAGISelMatcherGen.cpp Tablegen: Add OperandWithDefaultOps Operand type 2012-09-06 14:15:52 +00:00
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp Refactored DFA generator. Merged transition class into state class. 2012-09-07 21:35:43 +00:00
DisassemblerEmitter.cpp
EDEmitter.cpp Fix a couple of Doxygen comment issues pointed out by -Wdocumentation. 2012-09-12 16:59:47 +00:00
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp TableGen: Add initializer. 2012-09-17 18:00:53 +00:00
InstrInfoEmitter.cpp TableGen subtarget emitter. Use getSchedClassIdx. 2012-09-18 03:55:55 +00:00
IntrinsicEmitter.cpp
LLVMBuild.txt
Makefile
PseudoLoweringEmitter.cpp Fix typo 2012-09-17 04:43:39 +00:00
RegisterInfoEmitter.cpp Add 'virtual' keywoards to output file for overridden functions. 2012-09-16 16:35:22 +00:00
SequenceToOffsetTable.h Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed. 2012-09-15 01:22:42 +00:00
SetTheory.cpp
SetTheory.h
StringToOffsetTable.h Add some missing includes for the build against stdcxx. 2012-08-10 10:53:56 +00:00
SubtargetEmitter.cpp Machine Model (-schedmodel only). Added SchedAliases. 2012-09-22 02:24:21 +00:00
TableGen.cpp
TableGenBackends.h
TGValueTypes.cpp
X86DisassemblerShared.h Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 2012-08-01 07:39:18 +00:00
X86DisassemblerTables.cpp Add a new compression type to ModRM table that detects when the memory modRM byte represent 8 instructions and the reg modRM byte represents up to 64 instructions. Reduces modRM table from 43k entreis to 25k entries. Based on a patch from Manman Ren. 2012-09-13 05:45:42 +00:00
X86DisassemblerTables.h
X86ModRMFilters.cpp
X86ModRMFilters.h Fix Doxygen issues: 2012-09-13 12:34:29 +00:00
X86RecognizableInstr.cpp Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 2012-09-19 06:37:45 +00:00
X86RecognizableInstr.h Remove code for setting the VEX L-bit as a function of operand size from the code emitters and the disassembler table builder. Fix a couple instructions that were still missing VEX_L. 2012-09-19 06:37:45 +00:00