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https://github.com/c64scene-ar/llvm-6502.git
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5a70dd1d82
Similar to gep (r230786) and load (r230794) changes. Similar migration script can be used to update test cases, which successfully migrated all of LLVM and Polly, but about 4 test cases needed manually changes in Clang. (this script will read the contents of stdin and massage it into stdout - wrap it in the 'apply.sh' script shown in previous commits + xargs to apply it over a large set of test cases) import fileinput import sys import re rep = re.compile(r"(getelementptr(?:\s+inbounds)?\s*\()((<\d*\s+x\s+)?([^@]*?)(|\s*addrspace\(\d+\))\s*\*(?(3)>)\s*)(?=$|%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|zeroinitializer|<|\[\[[a-zA-Z]|\{\{)", re.MULTILINE | re.DOTALL) def conv(match): line = match.group(1) line += match.group(4) line += ", " line += match.group(2) return line line = sys.stdin.read() off = 0 for match in re.finditer(rep, line): sys.stdout.write(line[off:match.start()]) sys.stdout.write(conv(match)) off = match.end() sys.stdout.write(line[off:]) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232184 91177308-0d34-0410-b5e6-96231b3b80d8
30 lines
995 B
LLVM
30 lines
995 B
LLVM
; RUN: llc < %s | FileCheck %s
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target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
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target triple = "x86_64-apple-darwin10.0.0"
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%0 = type <{ %1, %1 }>
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%1 = type { i8, i8, i8, i8 }
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@g_2 = global %0 zeroinitializer
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@g_4 = global %1 zeroinitializer, align 4
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; PR8642
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define i16 @test1(i1 zeroext %C, i8** nocapture %argv) nounwind ssp {
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entry:
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br i1 %C, label %cond.end.i, label %cond.false.i
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cond.false.i: ; preds = %entry
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br label %cond.end.i
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cond.end.i: ; preds = %entry
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%call1 = phi i16 [ trunc (i32 srem (i32 1, i32 zext (i1 icmp eq (%1* bitcast (i8* getelementptr inbounds (%0, %0* @g_2, i64 0, i32 1, i32 0) to %1*), %1* @g_4) to i32)) to i16), %cond.false.i ], [ 1, %entry ]
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ret i16 %call1
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}
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; CHECK-LABEL: test1:
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; CHECK: testb %dil, %dil
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; CHECK: jne LBB0_2
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; CHECK: divl
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; CHECK: LBB0_2:
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