mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-23 02:29:18 +00:00
The old PPCCTRLoops pass, like the Hexagon pass version from which it was derived, could only handle some simple loops in canonical form. We cannot directly adapt the new Hexagon hardware loops pass, however, because the Hexagon pass contains a fundamental assumption that non-constant-trip-count loops will contain a guard, and this is not always true (the result being that incorrect negative counts can be generated). With this commit, we replace the pass with a late IR-level pass which makes use of SE to calculate the backedge-taken counts and safely generate the loop-count expressions (including any necessary max() parts). This IR level pass inserts custom intrinsics that are lowered into the desired decrement-and-branch instructions. The most fragile part of this new implementation is that interfering uses of the counter register must be detected on the IR level (and, on PPC, this also includes any indirect branches in addition to function calls). Also, to make all of this work, we need a variant of the mtctr instruction that is marked as having side effects. Without this, machine-code level CSE, DCE, etc. illegally transform the resulting code. Hopefully, this can be improved in the future. This new pass is smaller than the original (and much smaller than the new Hexagon hardware loops pass), and can handle many additional cases correctly. In addition, the preheader-creation code has been copied from LoopSimplify, and after we decide on where it belongs, this code will be refactored so that it can be explicitly shared (making this implementation even smaller). The new test-case files ctrloop-{le,lt,ne}.ll have been adapted from tests for the new Hexagon pass. There are a few classes of loops that this pass does not transform (noted by FIXMEs in the files), but these deficiencies can be addressed within the SE infrastructure (thus helping many other passes as well). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181927 91177308-0d34-0410-b5e6-96231b3b80d8
87 lines
2.9 KiB
LLVM
87 lines
2.9 KiB
LLVM
; RUN: llc < %s -mcpu=a2 | FileCheck %s
|
|
; RUN: llc < %s -mcpu=a2 -disable-lsr | FileCheck -check-prefix=NOLSR %s
|
|
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
|
|
target triple = "powerpc64-unknown-linux-gnu"
|
|
|
|
define void @main() #0 {
|
|
entry:
|
|
br i1 undef, label %for.end, label %for.body
|
|
|
|
for.body: ; preds = %for.body, %entry
|
|
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ]
|
|
%indvars.iv.next = add i64 %indvars.iv, 1
|
|
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
|
|
%exitcond = icmp eq i32 %lftr.wideiv, 0
|
|
br i1 %exitcond, label %for.end, label %for.body
|
|
|
|
; CHECK: @main
|
|
; CHECK: li [[REG:[0-9]+]], 0
|
|
; CHECK: oris [[REG2:[0-9]+]], [[REG]], 65535
|
|
; CHECK: ori [[REG3:[0-9]+]], [[REG2]], 65535
|
|
; CHECK: mtctr [[REG3]]
|
|
; CHECK: bdnz
|
|
|
|
for.end: ; preds = %for.body, %entry
|
|
ret void
|
|
}
|
|
|
|
define void @main1() #0 {
|
|
entry:
|
|
br i1 undef, label %for.end, label %for.body
|
|
|
|
for.body: ; preds = %for.body, %entry
|
|
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ]
|
|
%indvars.iv.next = add i64 %indvars.iv, 1
|
|
%exitcond = icmp eq i64 %indvars.iv.next, 0
|
|
br i1 %exitcond, label %for.end, label %for.body
|
|
|
|
; CHECK: @main1
|
|
; CHECK: li [[REG:[0-9]+]], -1
|
|
; CHECK: mtctr [[REG]]
|
|
; CHECK: bdnz
|
|
|
|
for.end: ; preds = %for.body, %entry
|
|
ret void
|
|
}
|
|
|
|
define void @main2() #0 {
|
|
entry:
|
|
br i1 undef, label %for.end, label %for.body
|
|
|
|
for.body: ; preds = %for.body, %entry
|
|
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 1, %entry ]
|
|
%indvars.iv.next = add i64 %indvars.iv, 1
|
|
%exitcond = icmp eq i64 %indvars.iv.next, -100000
|
|
br i1 %exitcond, label %for.end, label %for.body
|
|
|
|
; CHECK: @main2
|
|
; CHECK: lis [[REG:[0-9]+]], -2
|
|
; CHECK: ori [[REG2:[0-9]+]], [[REG]], 31071
|
|
; CHECK: mtctr [[REG2]]
|
|
; CHECK: bdnz
|
|
|
|
for.end: ; preds = %for.body, %entry
|
|
ret void
|
|
}
|
|
|
|
define void @main3() #0 {
|
|
entry:
|
|
br i1 undef, label %for.end, label %for.body
|
|
|
|
for.body: ; preds = %for.body, %entry
|
|
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 127984, %entry ]
|
|
%indvars.iv.next = add i64 %indvars.iv, -16
|
|
%exitcond = icmp eq i64 %indvars.iv.next, -16
|
|
br i1 %exitcond, label %for.end, label %for.body
|
|
|
|
; NOLSR: @main3
|
|
; NOLSR: li [[REG:[0-9]+]], 8000
|
|
; NOLSR: mtctr [[REG]]
|
|
; NOLSR: bdnz
|
|
|
|
for.end: ; preds = %for.body, %entry
|
|
ret void
|
|
}
|
|
|
|
attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
|