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https://github.com/c64scene-ar/llvm-6502.git
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065f259ff5
#NAME# with the name of the defm instantiating the multiclass. This is
useful for AVX instruction naming where a "V" prefix is standard
throughout the ISA. For example:
multiclass SSE_AVX_Inst<...> {
def SS : Instr<...>;
def SD : Instr<...>;
def PS : Instr<...>;
def PD : Instr<...>;
def V#NAME#SS : Instr<...>;
def V#NAME#SD : Instr<...>;
def V#NAME#PS : Instr<...>;
def V#NAME#PD : Instr<...>;
}
defm ADD : SSE_AVX_Inst<...>;
Results in
ADDSS
ADDSD
ADDPS
ADDPD
VADDSS
VADDSD
VADDPS
VADDPD
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70979 91177308-0d34-0410-b5e6-96231b3b80d8
13 lines
218 B
TableGen
13 lines
218 B
TableGen
// RUN: tblgen %s | grep WorldHelloCC | count 1
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class C<string n> {
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string name = n;
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}
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multiclass Names<string n, string m> {
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def CC : C<n>;
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def World#NAME#CC : C<m>;
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}
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defm Hello : Names<"hello", "world">;
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