Zoran Jovanovic 0bf4807a90 [mips][microMIPS] Implement ADDIUSP instruction ... Differential Revision: http://reviews.llvm.org/D5084 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219500 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-10 14:37:30 +00:00
..
AArch64
ARM
AsmParser
COFF	Fix COFF section index relocation should be 16 bits, not 32	2014-10-08 18:01:49 +00:00
Disassembler	[X86] Fix a bug where the disassembler was ignoring the VEX.W bit in 32-bit mode for certain instructions it shouldn't.	2014-10-07 07:29:50 +00:00
ELF
MachO	MachObjectWriter: optimize the string table for common suffices	2014-10-06 17:05:19 +00:00
Markup
Mips	[mips][microMIPS] Implement ADDIUSP instruction	2014-10-10 14:37:30 +00:00
PowerPC	[PPC64] VSX indexed-form loads use wrong instruction format	2014-10-09 17:51:35 +00:00
Sparc
SystemZ
X86	[AVX512] Extended avx512_binop_rm for AVX512VL subsets.	2014-10-09 08:38:48 +00:00