Owen Anderson 43967a97cf Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135290 91177308-0d34-0410-b5e6-96231b3b80d8		2011-07-15 18:46:47 +00:00
..
Alpha
ARM	Remove VMOVDneon and VMOVQ, which are just aliases for VORR. This continues to simplify the path towards an auto-generated disassembler.	2011-07-15 18:46:47 +00:00
Blackfin	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CBackend	more tests not making the jump into the brave new world.	2011-07-09 16:57:10 +00:00
CellSPU
CPP
Generic	Comment correction.	2011-07-12 03:39:22 +00:00
MBlaze
Mips
MSP430
PowerPC	test/CodeGen/PowerPC/vector.ll: Tweak redirection >%t >%t to >%t >>%t. See also r134814 (test/CodeGen/X86/vector.ll).	2011-07-11 16:21:52 +00:00
PTX
SPARC
SystemZ
Thumb
Thumb2	Improve codegen for select's:	2011-07-13 00:42:17 +00:00
X86	Check register class matching instead of width of type matching	2011-07-14 20:13:52 +00:00
XCore