mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
365 lines
13 KiB
C++
365 lines
13 KiB
C++
//===- MBlazeRegisterInfo.cpp - MBlaze Register Information -== -*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the MBlaze implementation of the TargetRegisterInfo
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// class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mblaze-frame-info"
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#include "MBlaze.h"
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#include "MBlazeSubtarget.h"
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#include "MBlazeRegisterInfo.h"
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#include "MBlazeMachineFunction.h"
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#include "llvm/Constants.h"
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#include "llvm/Type.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineLocation.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/BitVector.h"
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#include "llvm/ADT/STLExtras.h"
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#define GET_REGINFO_MC_DESC
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#define GET_REGINFO_TARGET_DESC
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#include "MBlazeGenRegisterInfo.inc"
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using namespace llvm;
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MBlazeRegisterInfo::
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MBlazeRegisterInfo(const MBlazeSubtarget &ST, const TargetInstrInfo &tii)
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: MBlazeGenRegisterInfo(), Subtarget(ST), TII(tii) {}
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/// getRegisterNumbering - Given the enum value for some register, e.g.
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/// MBlaze::R0, return the number that it corresponds to (e.g. 0).
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unsigned MBlazeRegisterInfo::getRegisterNumbering(unsigned RegEnum) {
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switch (RegEnum) {
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case MBlaze::R0 : return 0;
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case MBlaze::R1 : return 1;
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case MBlaze::R2 : return 2;
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case MBlaze::R3 : return 3;
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case MBlaze::R4 : return 4;
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case MBlaze::R5 : return 5;
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case MBlaze::R6 : return 6;
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case MBlaze::R7 : return 7;
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case MBlaze::R8 : return 8;
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case MBlaze::R9 : return 9;
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case MBlaze::R10 : return 10;
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case MBlaze::R11 : return 11;
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case MBlaze::R12 : return 12;
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case MBlaze::R13 : return 13;
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case MBlaze::R14 : return 14;
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case MBlaze::R15 : return 15;
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case MBlaze::R16 : return 16;
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case MBlaze::R17 : return 17;
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case MBlaze::R18 : return 18;
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case MBlaze::R19 : return 19;
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case MBlaze::R20 : return 20;
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case MBlaze::R21 : return 21;
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case MBlaze::R22 : return 22;
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case MBlaze::R23 : return 23;
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case MBlaze::R24 : return 24;
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case MBlaze::R25 : return 25;
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case MBlaze::R26 : return 26;
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case MBlaze::R27 : return 27;
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case MBlaze::R28 : return 28;
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case MBlaze::R29 : return 29;
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case MBlaze::R30 : return 30;
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case MBlaze::R31 : return 31;
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case MBlaze::RPC : return 0x0000;
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case MBlaze::RMSR : return 0x0001;
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case MBlaze::REAR : return 0x0003;
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case MBlaze::RESR : return 0x0005;
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case MBlaze::RFSR : return 0x0007;
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case MBlaze::RBTR : return 0x000B;
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case MBlaze::REDR : return 0x000D;
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case MBlaze::RPID : return 0x1000;
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case MBlaze::RZPR : return 0x1001;
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case MBlaze::RTLBX : return 0x1002;
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case MBlaze::RTLBLO : return 0x1003;
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case MBlaze::RTLBHI : return 0x1004;
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case MBlaze::RPVR0 : return 0x2000;
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case MBlaze::RPVR1 : return 0x2001;
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case MBlaze::RPVR2 : return 0x2002;
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case MBlaze::RPVR3 : return 0x2003;
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case MBlaze::RPVR4 : return 0x2004;
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case MBlaze::RPVR5 : return 0x2005;
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case MBlaze::RPVR6 : return 0x2006;
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case MBlaze::RPVR7 : return 0x2007;
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case MBlaze::RPVR8 : return 0x2008;
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case MBlaze::RPVR9 : return 0x2009;
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case MBlaze::RPVR10 : return 0x200A;
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case MBlaze::RPVR11 : return 0x200B;
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default: llvm_unreachable("Unknown register number!");
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}
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return 0; // Not reached
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}
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/// getRegisterFromNumbering - Given the enum value for some register, e.g.
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/// MBlaze::R0, return the number that it corresponds to (e.g. 0).
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unsigned MBlazeRegisterInfo::getRegisterFromNumbering(unsigned Reg) {
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switch (Reg) {
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case 0 : return MBlaze::R0;
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case 1 : return MBlaze::R1;
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case 2 : return MBlaze::R2;
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case 3 : return MBlaze::R3;
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case 4 : return MBlaze::R4;
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case 5 : return MBlaze::R5;
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case 6 : return MBlaze::R6;
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case 7 : return MBlaze::R7;
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case 8 : return MBlaze::R8;
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case 9 : return MBlaze::R9;
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case 10 : return MBlaze::R10;
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case 11 : return MBlaze::R11;
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case 12 : return MBlaze::R12;
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case 13 : return MBlaze::R13;
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case 14 : return MBlaze::R14;
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case 15 : return MBlaze::R15;
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case 16 : return MBlaze::R16;
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case 17 : return MBlaze::R17;
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case 18 : return MBlaze::R18;
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case 19 : return MBlaze::R19;
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case 20 : return MBlaze::R20;
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case 21 : return MBlaze::R21;
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case 22 : return MBlaze::R22;
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case 23 : return MBlaze::R23;
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case 24 : return MBlaze::R24;
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case 25 : return MBlaze::R25;
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case 26 : return MBlaze::R26;
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case 27 : return MBlaze::R27;
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case 28 : return MBlaze::R28;
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case 29 : return MBlaze::R29;
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case 30 : return MBlaze::R30;
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case 31 : return MBlaze::R31;
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default: llvm_unreachable("Unknown register number!");
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}
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return 0; // Not reached
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}
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unsigned MBlazeRegisterInfo::getSpecialRegisterFromNumbering(unsigned Reg) {
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switch (Reg) {
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case 0x0000 : return MBlaze::RPC;
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case 0x0001 : return MBlaze::RMSR;
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case 0x0003 : return MBlaze::REAR;
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case 0x0005 : return MBlaze::RESR;
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case 0x0007 : return MBlaze::RFSR;
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case 0x000B : return MBlaze::RBTR;
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case 0x000D : return MBlaze::REDR;
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case 0x1000 : return MBlaze::RPID;
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case 0x1001 : return MBlaze::RZPR;
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case 0x1002 : return MBlaze::RTLBX;
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case 0x1003 : return MBlaze::RTLBLO;
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case 0x1004 : return MBlaze::RTLBHI;
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case 0x2000 : return MBlaze::RPVR0;
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case 0x2001 : return MBlaze::RPVR1;
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case 0x2002 : return MBlaze::RPVR2;
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case 0x2003 : return MBlaze::RPVR3;
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case 0x2004 : return MBlaze::RPVR4;
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case 0x2005 : return MBlaze::RPVR5;
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case 0x2006 : return MBlaze::RPVR6;
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case 0x2007 : return MBlaze::RPVR7;
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case 0x2008 : return MBlaze::RPVR8;
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case 0x2009 : return MBlaze::RPVR9;
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case 0x200A : return MBlaze::RPVR10;
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case 0x200B : return MBlaze::RPVR11;
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default: llvm_unreachable("Unknown register number!");
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}
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return 0; // Not reached
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}
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bool MBlazeRegisterInfo::isRegister(unsigned Reg) {
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return Reg <= 31;
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}
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bool MBlazeRegisterInfo::isSpecialRegister(unsigned Reg) {
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switch (Reg) {
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case 0x0000 : case 0x0001 : case 0x0003 : case 0x0005 :
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case 0x0007 : case 0x000B : case 0x000D : case 0x1000 :
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case 0x1001 : case 0x1002 : case 0x1003 : case 0x1004 :
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case 0x2000 : case 0x2001 : case 0x2002 : case 0x2003 :
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case 0x2004 : case 0x2005 : case 0x2006 : case 0x2007 :
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case 0x2008 : case 0x2009 : case 0x200A : case 0x200B :
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return true;
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default:
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return false;
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}
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return false; // Not reached
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}
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unsigned MBlazeRegisterInfo::getPICCallReg() {
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return MBlaze::R20;
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}
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//===----------------------------------------------------------------------===//
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// Callee Saved Registers methods
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//===----------------------------------------------------------------------===//
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/// MBlaze Callee Saved Registers
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const unsigned* MBlazeRegisterInfo::
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getCalleeSavedRegs(const MachineFunction *MF) const {
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// MBlaze callee-save register range is R20 - R31
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static const unsigned CalleeSavedRegs[] = {
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MBlaze::R20, MBlaze::R21, MBlaze::R22, MBlaze::R23,
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MBlaze::R24, MBlaze::R25, MBlaze::R26, MBlaze::R27,
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MBlaze::R28, MBlaze::R29, MBlaze::R30, MBlaze::R31,
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0
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};
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return CalleeSavedRegs;
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}
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BitVector MBlazeRegisterInfo::
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getReservedRegs(const MachineFunction &MF) const {
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BitVector Reserved(getNumRegs());
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Reserved.set(MBlaze::R0);
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Reserved.set(MBlaze::R1);
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Reserved.set(MBlaze::R2);
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Reserved.set(MBlaze::R13);
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Reserved.set(MBlaze::R14);
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Reserved.set(MBlaze::R15);
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Reserved.set(MBlaze::R16);
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Reserved.set(MBlaze::R17);
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Reserved.set(MBlaze::R18);
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Reserved.set(MBlaze::R19);
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return Reserved;
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}
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// This function eliminate ADJCALLSTACKDOWN/ADJCALLSTACKUP pseudo instructions
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void MBlazeRegisterInfo::
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eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I) const {
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const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
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if (!TFI->hasReservedCallFrame(MF)) {
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// If we have a frame pointer, turn the adjcallstackup instruction into a
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// 'addi r1, r1, -<amt>' and the adjcallstackdown instruction into
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// 'addi r1, r1, <amt>'
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MachineInstr *Old = I;
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int Amount = Old->getOperand(0).getImm() + 4;
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if (Amount != 0) {
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// We need to keep the stack aligned properly. To do this, we round the
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// amount of space needed for the outgoing arguments up to the next
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// alignment boundary.
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unsigned Align = TFI->getStackAlignment();
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Amount = (Amount+Align-1)/Align*Align;
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MachineInstr *New;
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if (Old->getOpcode() == MBlaze::ADJCALLSTACKDOWN) {
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New = BuildMI(MF,Old->getDebugLoc(),TII.get(MBlaze::ADDIK),MBlaze::R1)
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.addReg(MBlaze::R1).addImm(-Amount);
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} else {
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assert(Old->getOpcode() == MBlaze::ADJCALLSTACKUP);
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New = BuildMI(MF,Old->getDebugLoc(),TII.get(MBlaze::ADDIK),MBlaze::R1)
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.addReg(MBlaze::R1).addImm(Amount);
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}
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// Replace the pseudo instruction with a new instruction...
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MBB.insert(I, New);
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}
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}
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// Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
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MBB.erase(I);
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}
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// FrameIndex represent objects inside a abstract stack.
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// We must replace FrameIndex with an stack/frame pointer
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// direct reference.
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void MBlazeRegisterInfo::
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eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
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RegScavenger *RS) const {
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MachineInstr &MI = *II;
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MachineFunction &MF = *MI.getParent()->getParent();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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unsigned i = 0;
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while (!MI.getOperand(i).isFI()) {
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++i;
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assert(i < MI.getNumOperands() &&
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"Instr doesn't have FrameIndex operand!");
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}
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unsigned oi = i == 2 ? 1 : 2;
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DEBUG(dbgs() << "\nFunction : " << MF.getFunction()->getName() << "\n";
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dbgs() << "<--------->\n" << MI);
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int FrameIndex = MI.getOperand(i).getIndex();
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int stackSize = MFI->getStackSize();
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int spOffset = MFI->getObjectOffset(FrameIndex);
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DEBUG(MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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dbgs() << "FrameIndex : " << FrameIndex << "\n"
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<< "spOffset : " << spOffset << "\n"
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<< "stackSize : " << stackSize << "\n"
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<< "isFixed : " << MFI->isFixedObjectIndex(FrameIndex) << "\n"
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<< "isLiveIn : " << MBlazeFI->isLiveIn(FrameIndex) << "\n"
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<< "isSpill : " << MFI->isSpillSlotObjectIndex(FrameIndex)
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<< "\n" );
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// as explained on LowerFormalArguments, detect negative offsets
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// and adjust SPOffsets considering the final stack size.
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int Offset = (spOffset < 0) ? (stackSize - spOffset) : spOffset;
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Offset += MI.getOperand(oi).getImm();
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DEBUG(dbgs() << "Offset : " << Offset << "\n" << "<--------->\n");
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MI.getOperand(oi).ChangeToImmediate(Offset);
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MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false);
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}
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void MBlazeRegisterInfo::
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processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
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// Set the stack offset where GP must be saved/loaded from.
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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if (MBlazeFI->needGPSaveRestore())
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MFI->setObjectOffset(MBlazeFI->getGPFI(), MBlazeFI->getGPStackOffset());
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}
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unsigned MBlazeRegisterInfo::getRARegister() const {
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return MBlaze::R15;
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}
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unsigned MBlazeRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
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const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
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return TFI->hasFP(MF) ? MBlaze::R19 : MBlaze::R1;
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}
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unsigned MBlazeRegisterInfo::getEHExceptionRegister() const {
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llvm_unreachable("What is the exception register");
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return 0;
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}
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unsigned MBlazeRegisterInfo::getEHHandlerRegister() const {
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llvm_unreachable("What is the exception handler register");
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return 0;
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}
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int MBlazeRegisterInfo::getDwarfRegNum(unsigned RegNo, bool isEH) const {
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return MBlazeGenRegisterInfo::getDwarfRegNumFull(RegNo,0);
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}
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int MBlazeRegisterInfo::getLLVMRegNum(unsigned DwarfRegNo, bool isEH) const {
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return MBlazeGenRegisterInfo::getLLVMRegNumFull(DwarfRegNo,0);
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}
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