Duraid Madina eac2a1bdbf this just might work ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25195 91177308-0d34-0410-b5e6-96231b3b80d8		2006-01-11 01:38:07 +00:00
..
Alpha	Int immediate loading fix	2006-01-10 19:12:47 +00:00
CBackend	yet more C++ standards-compliance stuff.	2005-12-27 10:40:34 +00:00
IA64	this just might work	2006-01-11 01:38:07 +00:00
PowerPC	Remove a comment that no longer applies.	2006-01-10 00:15:59 +00:00
Skeleton	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
Sparc	New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace	2006-01-09 18:28:21 +00:00
SparcV8	New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace	2006-01-09 18:28:21 +00:00
SparcV9	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
X86	implement FP_REG_KILL insertion for the dag-dag instruction selector	2006-01-11 01:15:34 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp
Target.td	New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace	2006-01-09 18:28:21 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td	New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace	2006-01-09 18:28:21 +00:00
TargetSubtarget.cpp