llvm-6502/lib/Target/ARM/Thumb2RegisterInfo.h
Evan Cheng 378445303b Let callers decide the sub-register index on the def operand of rematerialized instructions.
Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-16 09:20:10 +00:00

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//===- Thumb2RegisterInfo.h - Thumb-2 Register Information Impl ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the Thumb-2 implementation of the TargetRegisterInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef THUMB2REGISTERINFO_H
#define THUMB2REGISTERINFO_H
#include "ARM.h"
#include "ARMRegisterInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
namespace llvm {
class ARMSubtarget;
class ARMBaseInstrInfo;
class Type;
struct Thumb2RegisterInfo : public ARMBaseRegisterInfo {
public:
Thumb2RegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI);
/// emitLoadConstPool - Emits a load from constpool to materialize the
/// specified immediate.
void emitLoadConstPool(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &MBBI,
DebugLoc dl,
unsigned DestReg, unsigned SubIdx, int Val,
ARMCC::CondCodes Pred = ARMCC::AL,
unsigned PredReg = 0) const;
bool requiresRegisterScavenging(const MachineFunction &MF) const;
};
}
#endif // THUMB2REGISTERINFO_H