mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-22 09:29:31 +00:00
344731c018
generated by llvm-gcc, since llvm-gcc uses 2 i64s for passing a 4 x float vector on ARM rather than an i64 array like Clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129878 91177308-0d34-0410-b5e6-96231b3b80d8
266 lines
9.2 KiB
LLVM
266 lines
9.2 KiB
LLVM
; RUN: opt < %s -scalarrepl -S | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "x86_64-apple-darwin10.0.0"
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define void @test1(<4 x float>* %F, float %f) {
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entry:
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%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
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%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
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%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp3, <4 x float>* %G
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%G.upgrd.1 = getelementptr <4 x float>* %G, i32 0, i32 0 ; <float*> [#uses=1]
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store float %f, float* %G.upgrd.1
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%tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2]
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%tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp6, <4 x float>* %F
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ret void
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; CHECK: @test1
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; CHECK-NOT: alloca
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; CHECK: %tmp = load <4 x float>* %F
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; CHECK: fadd <4 x float> %tmp, %tmp
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; CHECK-NEXT: insertelement <4 x float> %tmp3, float %f, i32 0
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}
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define void @test2(<4 x float>* %F, float %f) {
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entry:
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%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
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%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
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%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp3, <4 x float>* %G
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%tmp.upgrd.2 = getelementptr <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
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store float %f, float* %tmp.upgrd.2
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%tmp4 = load <4 x float>* %G ; <<4 x float>> [#uses=2]
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%tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp6, <4 x float>* %F
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ret void
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; CHECK: @test2
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; CHECK-NOT: alloca
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; CHECK: %tmp = load <4 x float>* %F
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; CHECK: fadd <4 x float> %tmp, %tmp
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; CHECK-NEXT: insertelement <4 x float> %tmp3, float %f, i32 2
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}
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define void @test3(<4 x float>* %F, float* %f) {
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entry:
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%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
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%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
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%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp3, <4 x float>* %G
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%tmp.upgrd.3 = getelementptr <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
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%tmp.upgrd.4 = load float* %tmp.upgrd.3 ; <float> [#uses=1]
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store float %tmp.upgrd.4, float* %f
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ret void
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; CHECK: @test3
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; CHECK-NOT: alloca
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; CHECK: %tmp = load <4 x float>* %F
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; CHECK: fadd <4 x float> %tmp, %tmp
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; CHECK-NEXT: extractelement <4 x float> %tmp3, i32 2
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}
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define void @test4(<4 x float>* %F, float* %f) {
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entry:
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%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
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%tmp = load <4 x float>* %F ; <<4 x float>> [#uses=2]
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%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp3, <4 x float>* %G
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%G.upgrd.5 = getelementptr <4 x float>* %G, i32 0, i32 0 ; <float*> [#uses=1]
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%tmp.upgrd.6 = load float* %G.upgrd.5 ; <float> [#uses=1]
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store float %tmp.upgrd.6, float* %f
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ret void
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; CHECK: @test4
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; CHECK-NOT: alloca
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; CHECK: %tmp = load <4 x float>* %F
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; CHECK: fadd <4 x float> %tmp, %tmp
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; CHECK-NEXT: extractelement <4 x float> %tmp3, i32 0
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}
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define i32 @test5(float %X) { ;; should turn into bitcast.
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%X_addr = alloca [4 x float]
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%X1 = getelementptr [4 x float]* %X_addr, i32 0, i32 2
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store float %X, float* %X1
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%a = bitcast float* %X1 to i32*
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%tmp = load i32* %a
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ret i32 %tmp
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; CHECK: @test5
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; CHECK-NEXT: bitcast float %X to i32
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; CHECK-NEXT: ret i32
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}
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define i64 @test6(<2 x float> %X) {
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%X_addr = alloca <2 x float>
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store <2 x float> %X, <2 x float>* %X_addr
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%P = bitcast <2 x float>* %X_addr to i64*
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%tmp = load i64* %P
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ret i64 %tmp
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; CHECK: @test6
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; CHECK: bitcast <2 x float> %X to i64
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; CHECK: ret i64
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}
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define float @test7(<4 x float> %x) {
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%a = alloca <4 x float>
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store <4 x float> %x, <4 x float>* %a
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%p = bitcast <4 x float>* %a to <2 x float>*
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%b = load <2 x float>* %p
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%q = getelementptr <4 x float>* %a, i32 0, i32 2
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%c = load float* %q
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ret float %c
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; CHECK: @test7
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; CHECK-NOT: alloca
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; CHECK: bitcast <4 x float> %x to <2 x double>
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; CHECK-NEXT: extractelement <2 x double>
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; CHECK-NEXT: bitcast double %tmp4 to <2 x float>
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; CHECK-NEXT: extractelement <4 x float>
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}
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define void @test8(<4 x float> %x, <2 x float> %y) {
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%a = alloca <4 x float>
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store <4 x float> %x, <4 x float>* %a
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%p = bitcast <4 x float>* %a to <2 x float>*
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store <2 x float> %y, <2 x float>* %p
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ret void
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; CHECK: @test8
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; CHECK-NOT: alloca
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; CHECK: bitcast <4 x float> %x to <2 x double>
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; CHECK-NEXT: bitcast <2 x float> %y to double
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; CHECK-NEXT: insertelement <2 x double>
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; CHECK-NEXT: bitcast <2 x double> %tmp2 to <4 x float>
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}
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define i256 @test9(<4 x i256> %x) {
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%a = alloca <4 x i256>
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store <4 x i256> %x, <4 x i256>* %a
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%p = bitcast <4 x i256>* %a to <2 x i256>*
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%b = load <2 x i256>* %p
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%q = getelementptr <4 x i256>* %a, i32 0, i32 2
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%c = load i256* %q
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ret i256 %c
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; CHECK: @test9
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; CHECK-NOT: alloca
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; CHECK: bitcast <4 x i256> %x to <2 x i512>
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; CHECK-NEXT: extractelement <2 x i512>
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; CHECK-NEXT: bitcast i512 %tmp4 to <2 x i256>
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; CHECK-NEXT: extractelement <4 x i256>
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}
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define void @test10(<4 x i256> %x, <2 x i256> %y) {
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%a = alloca <4 x i256>
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store <4 x i256> %x, <4 x i256>* %a
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%p = bitcast <4 x i256>* %a to <2 x i256>*
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store <2 x i256> %y, <2 x i256>* %p
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ret void
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; CHECK: @test10
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; CHECK-NOT: alloca
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; CHECK: bitcast <4 x i256> %x to <2 x i512>
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; CHECK-NEXT: bitcast <2 x i256> %y to i512
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; CHECK-NEXT: insertelement <2 x i512>
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; CHECK-NEXT: bitcast <2 x i512> %tmp2 to <4 x i256>
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}
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%union.v = type { <2 x i64> }
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define void @test11(<2 x i64> %x) {
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%a = alloca %union.v
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%p = getelementptr inbounds %union.v* %a, i32 0, i32 0
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store <2 x i64> %x, <2 x i64>* %p, align 16
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%q = getelementptr inbounds %union.v* %a, i32 0, i32 0
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%r = bitcast <2 x i64>* %q to <4 x float>*
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%b = load <4 x float>* %r, align 16
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ret void
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; CHECK: @test11
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; CHECK-NOT: alloca
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}
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define void @test12() {
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entry:
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%a = alloca <64 x i8>, align 64
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store <64 x i8> undef, <64 x i8>* %a, align 64
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%p = bitcast <64 x i8>* %a to <16 x i8>*
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%0 = load <16 x i8>* %p, align 64
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store <16 x i8> undef, <16 x i8>* %p, align 64
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%q = bitcast <16 x i8>* %p to <64 x i8>*
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%1 = load <64 x i8>* %q, align 64
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ret void
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; CHECK: @test12
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; CHECK-NOT: alloca
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; CHECK: extractelement <4 x i128>
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; CHECK: insertelement <4 x i128>
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}
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define float @test13(<4 x float> %x, <2 x i32> %y) {
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%a = alloca <4 x float>
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store <4 x float> %x, <4 x float>* %a
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%p = bitcast <4 x float>* %a to <2 x float>*
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%b = load <2 x float>* %p
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%q = getelementptr <4 x float>* %a, i32 0, i32 2
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%c = load float* %q
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%r = bitcast <4 x float>* %a to <2 x i32>*
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store <2 x i32> %y, <2 x i32>* %r
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ret float %c
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; CHECK: @test13
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; CHECK-NOT: alloca
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; CHECK: bitcast <4 x float> %x to i128
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}
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define <3 x float> @test14(<3 x float> %x) {
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entry:
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%x.addr = alloca <3 x float>, align 16
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%r = alloca <3 x i32>, align 16
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%extractVec = shufflevector <3 x float> %x, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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%storetmp = bitcast <3 x float>* %x.addr to <4 x float>*
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store <4 x float> %extractVec, <4 x float>* %storetmp, align 16
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%tmp = load <3 x float>* %x.addr, align 16
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%cmp = fcmp une <3 x float> %tmp, zeroinitializer
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%sext = sext <3 x i1> %cmp to <3 x i32>
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%and = and <3 x i32> <i32 1065353216, i32 1065353216, i32 1065353216>, %sext
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%extractVec1 = shufflevector <3 x i32> %and, <3 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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%storetmp2 = bitcast <3 x i32>* %r to <4 x i32>*
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store <4 x i32> %extractVec1, <4 x i32>* %storetmp2, align 16
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%tmp3 = load <3 x i32>* %r, align 16
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%0 = bitcast <3 x i32> %tmp3 to <3 x float>
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%tmp4 = load <3 x float>* %x.addr, align 16
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ret <3 x float> %tmp4
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; CHECK: @test14
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; CHECK-NOT: alloca
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; CHECK: shufflevector <4 x i32> %extractVec1, <4 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
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}
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define void @test15(<3 x i64>* sret %agg.result, <3 x i64> %x, <3 x i64> %min) {
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entry:
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%x.addr = alloca <3 x i64>, align 32
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%min.addr = alloca <3 x i64>, align 32
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%extractVec = shufflevector <3 x i64> %x, <3 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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%storetmp = bitcast <3 x i64>* %x.addr to <4 x i64>*
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store <4 x i64> %extractVec, <4 x i64>* %storetmp, align 32
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%extractVec1 = shufflevector <3 x i64> %min, <3 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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%storetmp2 = bitcast <3 x i64>* %min.addr to <4 x i64>*
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store <4 x i64> %extractVec1, <4 x i64>* %storetmp2, align 32
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%tmp = load <3 x i64>* %x.addr
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%tmp5 = extractelement <3 x i64> %tmp, i32 0
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%tmp11 = insertelement <3 x i64> %tmp, i64 %tmp5, i32 0
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store <3 x i64> %tmp11, <3 x i64>* %x.addr
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%tmp30 = load <3 x i64>* %x.addr, align 32
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store <3 x i64> %tmp30, <3 x i64>* %agg.result
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ret void
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; CHECK: @test15
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; CHECK-NOT: alloca
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; CHECK: shufflevector <4 x i64> %tmpV2, <4 x i64> undef, <3 x i32> <i32 0, i32 1, i32 2>
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}
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define <4 x float> @test16(<4 x float> %x, i64 %y0, i64 %y1) {
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entry:
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%tmp8 = bitcast <4 x float> undef to <2 x double>
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%tmp9 = bitcast i64 %y0 to double
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%tmp10 = insertelement <2 x double> %tmp8, double %tmp9, i32 0
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%tmp11 = bitcast <2 x double> %tmp10 to <4 x float>
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%tmp3 = bitcast <4 x float> %tmp11 to <2 x double>
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%tmp4 = bitcast i64 %y1 to double
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%tmp5 = insertelement <2 x double> %tmp3, double %tmp4, i32 1
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%tmp6 = bitcast <2 x double> %tmp5 to <4 x float>
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ret <4 x float> %tmp6
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; CHECK: @test16
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; CHECK-NOT: alloca
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; CHECK: bitcast <4 x float> %tmp11 to <2 x double>
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}
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